1. 18 11月, 2016 5 次提交
    • T
      reset: Add Tegra BPMP reset driver · dc606c52
      Thierry Reding 提交于
      This driver uses the services provided by the BPMP firmware driver to
      implement a reset driver based on the MRQ_RESET request.
      Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      dc606c52
    • T
      firmware: tegra: Add BPMP support · 983de5f9
      Thierry Reding 提交于
      The Boot and Power Management Processor (BPMP) is a co-processor found
      on Tegra SoCs. It is designed to handle the early stages of the boot
      process and offload power management tasks (such as clocks, resets,
      powergates, ...) as well as system control services.
      
      Compared to the ARM SCPI, the services provided by BPMP are message-
      based rather than method-based. The BPMP firmware driver provides the
      services to transmit data to and receive data from the BPMP. Users can
      also register a Message ReQuest (MRQ), for which a service routine will
      be run when a corresponding event is received from the firmware.
      
      A set of messages, called the BPMP ABI, are specified for a number of
      different services provided by the BPMP (such as clocks or resets).
      
      Based on work by Sivaram Nair <sivaramn@nvidia.com> and Joseph Lo
      <josephl@nvidia.com>.
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      983de5f9
    • T
      firmware: tegra: Add IVC library · ca791d7f
      Thierry Reding 提交于
      The Inter-VM communication (IVC) is a communication protocol which is
      designed for interprocessor communication (IPC) or the communication
      between the hypervisor and the virtual machine with a guest OS.
      
      Message channels are used to communicate between processors. They are
      backed by DRAM or SRAM, so care must be taken to maintain coherence of
      data.
      
      The IVC library maintains memory-based descriptors for the transmission
      and reception channels as well as the data coherence of the counter and
      payload. Clients, such as the driver for the BPMP firmware, can use the
      library to exchange messages with remote processors.
      
      Based on work by Peter Newman <pnewman@nvidia.com> and Joseph Lo
      <josephl@nvidia.com>.
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      ca791d7f
    • D
      mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells() · 68050eb6
      Dan Carpenter 提交于
      We have to use the _safe version of list_for_each() because we're
      freeing the pointer as we go along.  (This might not show up testing
      depending on what config options you have enabled).
      
      Fixes: 0fe88461 ("mailbox: Add Tegra HSP driver")
      Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      68050eb6
    • T
      mailbox: Add Tegra HSP driver · 0fe88461
      Thierry Reding 提交于
      This driver exposes a mailbox interface for interprocessor communication
      using the Hardware Synchronization Primitives (HSP) module's doorbell
      mechanism. There are multiple HSP instances and they provide additional
      features such as shared mailboxes, shared and arbitrated semaphores.
      
      A driver for a remote processor can use the mailbox client provided by
      the HSP driver and build an IPC protocol on top of this synchronization
      mechanism.
      
      Based on work by Joseph Lo <josephl@nvidia.com>.
      Acked-by: NJassi Brar <jaswinder.singh@linaro.org>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      0fe88461
  2. 15 11月, 2016 1 次提交
  3. 15 10月, 2016 10 次提交
  4. 14 10月, 2016 4 次提交
  5. 13 10月, 2016 18 次提交
  6. 12 10月, 2016 2 次提交