- 25 1月, 2014 40 次提交
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由 Antony Pavlov 提交于
In the worst case this adds less then 128 bytes of code but on the other hand this makes code organization more clear. Signed-off-by: NAntony Pavlov <antonynpavlov@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Crispin <blogic@openwrt.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6344/
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由 Wolfram Sang 提交于
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6349/
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由 Wolfram Sang 提交于
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6348/
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6343/
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Acked-by: NHauke Mehrtens <hauke@hauke-m.de> Acked-by: NMichael Buesch <m@bues.ch> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6342/
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由 Hauke Mehrtens 提交于
This fixes the following sparse warnings: arch/mips/bcm47xx/board.c:39:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:46:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:53:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:78:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:99:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:109:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:124:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:155:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:177:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:189:16: warning: Using plain integer as NULL pointer Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Acked-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6318/
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由 Hauke Mehrtens 提交于
This adds board detection for Linksys WRT54GS V1. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Acked-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6317/
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由 Hauke Mehrtens 提交于
When a nvram reset was performed from CFE, it sometimes does not contain the productid value in nvram, but it still contains hardware_version. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Acked-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6316/
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由 Rafał Miłecki 提交于
This is supported since implementing IRQ domain in ssb. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6315/
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6313/
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由 Rafał Miłecki 提交于
Some devices have power LED as well as status LED. The second one is used to show the firmware is up and running. Set "timer" trigger for such LEDs. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6312/
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由 Hauke Mehrtens 提交于
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6310/
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由 Hauke Mehrtens 提交于
With this patch we prevent the irq from being fired when it is registered. The Hardware fires an IRQ when input signal XOR polarity AND gpio mask is 1. Now we are setting polarity to a vlaue so that is is 0 when we register it. In addition we also set the irq mask register to 0 when the irq handler is initialized, so all gpio irqs are masked and there will be no unexpected irq. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Tested-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6304/
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由 Markos Chandras 提交于
BUG() can be a noop if CONFIG_BUG is not selected, leading to the following build problem on a randconfig: arch/mips/bcm63xx/cpu.c: In function 'detect_cpu_clock': arch/mips/bcm63xx/cpu.c:254:1: error: control reaches end of non-void function [-Werror=return-type] We fix this problem by replacing BUG() with panic() since it's best to handle the case of an unknown board instead of silently returning a random clock frequency. Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Acked-by: NSteven J. Hill <Steven.Hill@imgtec.com> Acked-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5932/
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由 Rafał Miłecki 提交于
This old wgt634u.c was trying to implement a bit ugly support for Netgear WGT634U. It provided info about LED, flash mapping & layout and was trying to handle reset button. This is not needed anymore as we have replacement for all this stuff. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6302/
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6298/
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由 Rafał Miłecki 提交于
This includes all devices from OpenWrt's "diag" that we support in arch code (we have entries for in enum bcm47xx_board). Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6301/
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由 Rafał Miłecki 提交于
So far this adds support for one Netgear model only, but it's designed and ready to add many more device. We could hopefully import database from OpenWrt. Support for SSB is currently disabled, because SSB doesn't implement IRQ domain yet. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Acked-by: NHauke Mehrtens <hauke@hauke-m.de> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6300/
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由 Rafał Miłecki 提交于
So far this is mostly just a proof of concept, database consists of a single device. Creating a nice iterateable array wasn't an option because devices have different amount of LEDs. And we don't want to waste memory just because of support for a device with dozens on LEDs. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Acked-by: NHauke Mehrtens <hauke@hauke-m.de> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6299/
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由 Hauke Mehrtens 提交于
The BCM4706 has a problem with the CPU wait instruction. When r4k_wait or r4k_wait_irqoff is used will just hang and not return from a msleep(). Removing the cpu_wait functionality is a workaround for this problem. The BCM4716 does not have this problem. The BCM4706 SoC uses a MIPS 74K V4.9 CPU. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6288/
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由 Hauke Mehrtens 提交于
This will add the board name to the machine entry in /proc/cpuinfo. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5864/
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由 Jayachandran C 提交于
Move wakeup to after early console. This will allow us to display error messages when cores are not woken up. Also reduce the wait time for core to come up. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6303/
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由 Jayachandran C 提交于
The early serial code is not needed because we already have early printk support provided by common/earlycons.c This change also fixes the following build error that occurs when CONFIG_SERIAL_8250 is not configured for Netlogic XLR boards: arch/mips/built-in.o: In function `nlm_early_serial_setup': setup.c:(.init.text+0x274): undefined reference to `early_serial_setup' make: *** [vmlinux] Error 1 Reported-by: NMarkos Chandras <markos.chandras@imgtec.com> Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6083/
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由 Jayachandran C 提交于
Add a default device tree fie for XLP9XX boards, and add code to use this device tree if no DTB is passed to the kernel. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6287/
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由 Jayachandran C 提交于
Support for adding legacy IRQ domain for XLP9XX. The node id of the PIC has to be calulated differently for XLP9XX. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6286/
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由 Ganesan Ramalingam 提交于
XLP9XX has a USB 3.0 controller on-chip with 2 xHCI ports. The USB block is similar to the one on XLP2XX, so update usb-init-xlp2.c to handle XLP9XX as well. Signed-off-by: NGanesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6285/
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由 Jayachandran C 提交于
Add PCI support for Netlogic XLP9XX. The PCI registers and SoC bus numbers have changed in XLP9XX. Also skip a few (bus,dev,fn) combinations which have issues when read. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6284/
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由 Jayachandran C 提交于
XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX. Update code that calculates node id from cpu id to handle this. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6283/
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由 Jayachandran C 提交于
Update bridge code. Add code to the XLP9XX registers for DRAM size, limit and node when running on XLPXX Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6282/
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由 Jayachandran C 提交于
Update IO offset of the early console UART. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6281/
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由 Jayachandran C 提交于
Add the SYS block registers for XLP9XX, most of them have changed. The wakeup sequence has been updated to set the coherent mode from the main thread rather than the woken up thread. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6280/
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由 Jayachandran C 提交于
Functions for the XLP9XX interrupt table entry format and other PIC register changes. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6279/
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由 Jayachandran C 提交于
Most IO block offsets have changed in XLP9XX. Update iomap.h to add the new addresses of different SoC blocks like PIC, SYS, UART etc. that are needed by the base code. On XLP9xx, the SoC blocks of other nodes are seen on a PCI bus corresponding to the node. Update iomap code to reflect this. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6277/
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由 Jayachandran C 提交于
Adds processor ID of XLP 9XX to asm/cpu.h. Update netlogic/xlp-hal/xlp.h to add cpu_is_xlp9xx() and to update cpu_is_xlpii() to support XLP 9XX. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6274/
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由 Jayachandran C 提交于
Use the FUSE register to get the list of active cores in the CPU instead of using the CPU reset register, this is the recommended method. Also add code to mask the coremask with the default number of cores for each processor series. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6275/
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由 Jayachandran C 提交于
Add macro nlm_node_present() that can be used to check if a node is present in a multi-chip configuration. This can be used even when NUMA is not enabled. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6272/
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由 Yonghong Song 提交于
On XLPII CPUs, the L1D cache has to be flushed with regular cache operations before enabling threads in a core. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6276/
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由 Jayachandran C 提交于
No change in logic, the changes are: * cleanup some whitespace and comments * remove confusing argument of SYS_CPU_COHERENT_BASE macro * make the numerical labels in macros consistent Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6273/
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由 Jayachandran C 提交于
Add mach-netlogic/topology.h which contains XLP cpu number to core and node mapping. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6271/
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由 Jayachandran C 提交于
Add MSI chip and MSIX chip definitions. For MSI, we map the link interrupt to a MSI link IRQ which will do a second level of dispatch based on the MSI status register. The MSI chip definitions use the MSI enable register to enable and disable the MSI irqs. For MSI-X, we split the 32 available MSI-X vectors across the four PCIe links (8 each). These PIC interrupts generate an IRQ per link which uses a second level dispatch as well. The MSI-X chip definition uses the standard functions to enable and disable interrupts. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6270/
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