1. 18 11月, 2013 1 次提交
  2. 15 11月, 2013 12 次提交
  3. 05 11月, 2013 5 次提交
  4. 24 10月, 2013 2 次提交
  5. 22 10月, 2013 1 次提交
  6. 10 10月, 2013 1 次提交
  7. 27 8月, 2013 2 次提交
  8. 14 8月, 2013 1 次提交
  9. 12 8月, 2013 2 次提交
    • B
      amd64_edac: Get rid of boot_cpu_data accesses · a4b4bedc
      Borislav Petkov 提交于
      Now that we cache (family, model, stepping) locally, use them instead of
      boot_cpu_data.
      
      No functionality change.
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      a4b4bedc
    • A
      amd64_edac: Add ECC decoding support for newer F15h models · 18b94f66
      Aravind Gopalakrishnan 提交于
      On newer models, support has been included for upto 4 DCT's, however,
      only DCT0 and DCT3 are currently configured (cf BKDG Section 2.10).
      Also, the routing DRAM Requests algorithm is different for F15h M30h.
      Thus it is cleaner to use a brand new function rather than adding quirks
      to the more generic f1x_match_to_this_node(). Refer to "2.10.5 DRAM
      Routing Requests" in the BKDG for further info.
      
      Tested on Fam15h M30h with ECC turned on using mce_amd_inj facility and
      verified to be functionally correct.
      
      While at it, verify if erratum workarounds for E505 and E637 still hold.
      From email conversations within AMD, the current status of the errata
      is:
      
            * Erratum 505: fixed in model 0x1, stepping 0x1 and later.
            * Erratum 637: not fixed.
      Signed-off-by: NAravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
      [ Cleanups, corrections ]
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      18b94f66
  10. 09 8月, 2013 2 次提交
  11. 29 7月, 2013 1 次提交
    • B
      amd64_edac: Fix single-channel setups · f0a56c48
      Borislav Petkov 提交于
      It can happen that configurations are running in a single-channel mode
      even with a dual-channel memory controller, by, say, putting the DIMMs
      only on the one channel and leaving the other empty. This causes a
      problem in init_csrows which implicitly assumes that when the second
      channel is enabled, i.e. channel 1, the struct dimm hierarchy will be
      present. Which is not.
      
      So always allocate two channels unconditionally.
      
      This provides for the nice side effect that the data structures are
      initialized so some day, when memory hotplug is supported, it should
      just work out of the box when all of a sudden a second channel appears.
      Reported-and-tested-by: NRoger Leigh <rleigh@debian.org>
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      f0a56c48
  12. 24 7月, 2013 2 次提交
    • J
      EDAC: Replace strict_strtol() with kstrtol() · c542b53d
      Jingoo Han 提交于
      The usage of strict_strtol() is not preferred, because strict_strtol()
      is obsolete. Thus, kstrtol() should be used.
      Signed-off-by: NJingoo Han <jg1.han@samsung.com>
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      c542b53d
    • B
      EDAC: Fix lockdep splat · 88d84ac9
      Borislav Petkov 提交于
      Fix the following:
      
      BUG: key ffff88043bdd0330 not in .data!
      ------------[ cut here ]------------
      WARNING: at kernel/lockdep.c:2987 lockdep_init_map+0x565/0x5a0()
      DEBUG_LOCKS_WARN_ON(1)
      Modules linked in: glue_helper sb_edac(+) edac_core snd acpi_cpufreq lrw gf128mul ablk_helper iTCO_wdt evdev i2c_i801 dcdbas button cryptd pcspkr iTCO_vendor_support usb_common lpc_ich mfd_core soundcore mperf processor microcode
      CPU: 2 PID: 599 Comm: modprobe Not tainted 3.10.0 #1
      Hardware name: Dell Inc. Precision T3600/0PTTT9, BIOS A08 01/24/2013
       0000000000000009 ffff880439a1d920 ffffffff8160a9a9 ffff880439a1d958
       ffffffff8103d9e0 ffff88043af4a510 ffffffff81a16e11 0000000000000000
       ffff88043bdd0330 0000000000000000 ffff880439a1d9b8 ffffffff8103dacc
      Call Trace:
        dump_stack
        warn_slowpath_common
        warn_slowpath_fmt
        lockdep_init_map
        ? trace_hardirqs_on_caller
        ? trace_hardirqs_on
        debug_mutex_init
        __mutex_init
        bus_register
        edac_create_sysfs_mci_device
        edac_mc_add_mc
        sbridge_probe
        pci_device_probe
        driver_probe_device
        __driver_attach
        ? driver_probe_device
        bus_for_each_dev
        driver_attach
        bus_add_driver
        driver_register
        __pci_register_driver
        ? 0xffffffffa0010fff
        sbridge_init
        ? 0xffffffffa0010fff
        do_one_initcall
        load_module
        ? unset_module_init_ro_nx
        SyS_init_module
        tracesys
      ---[ end trace d24a70b0d3ddf733 ]---
      EDAC MC0: Giving out device to 'sbridge_edac.c' 'Sandy Bridge Socket#0': DEV 0000:3f:0e.0
      EDAC sbridge: Driver loaded.
      
      What happens is that bus_register needs a statically allocated lock_key
      because the last is handed in to lockdep. However, struct mem_ctl_info
      embeds struct bus_type (the whole struct, not a pointer to it) and the
      whole thing gets dynamically allocated.
      
      Fix this by using a statically allocated struct bus_type for the MC bus.
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      Acked-by: NMauro Carvalho Chehab <mchehab@infradead.org>
      Cc: Markus Trippelsdorf <markus@trippelsdorf.de>
      Cc: stable@kernel.org # v3.10
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      88d84ac9
  13. 18 7月, 2013 1 次提交
  14. 11 6月, 2013 1 次提交
  15. 08 6月, 2013 2 次提交
  16. 04 6月, 2013 1 次提交
  17. 21 5月, 2013 1 次提交
  18. 09 5月, 2013 1 次提交
    • S
      EDAC: Don't give write permission to read-only files · c8c64d16
      Srivatsa S. Bhat 提交于
      I get the following warning on boot:
      
      ------------[ cut here ]------------
      WARNING: at drivers/base/core.c:575 device_create_file+0x9a/0xa0()
      Hardware name:  -[8737R2A]-
      Write permission without 'store'
      ...
      </snip>
      
      Drilling down, this is related to dynamic channel ce_count attribute
      files sporting a S_IWUSR mode without a ->store() function. Looking
      around, it appears that they aren't supposed to have a ->store()
      function. So remove the bogus write permission to get rid of the
      warning.
      Signed-off-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Cc: Mauro Carvalho Chehab <mchehab@redhat.com>
      Cc: <stable@vger.kernel.org> # 3.[89]
      [ shorten commit message ]
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      c8c64d16
  19. 29 4月, 2013 1 次提交
    • L
      edac: sb_edac.c should not require prescence of IMC_DDRIO device · de4772c6
      Luck, Tony 提交于
      The Sandy Bridge EDAC driver uses a register in the IMC_DDRIO CSR
      space to determine the type of DIMMs (registered or unregistered).
      But this device does not exist on some single socket Sandy Bridge
      servers.  While the type of DIMMs is nice to know, it is not essential
      for this driver's other functions. So it seems harsh to have it
      refuse to load at all when it cannot find this device.
      
      Make the check for this device be optional. If it isn't present
      just report the memory type as "MEM_UNKNOWN".
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
      de4772c6