- 13 9月, 2012 1 次提交
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由 Tony Lindgren 提交于
As the plat and mach includes need to disappear for single zImage work, we need to remove plat/hardware.h. Do this by splitting plat/hardware.h into omap1 and omap2+ specific files. The old plat/hardware.h already has omap1 only defines, so it gets moved to mach/hardware.h for omap1. For omap2+, we use the local soc.h that for now just includes the related SoC headers to keep this patch more readable. Note that the local soc.h still includes plat/cpu.h that can be dealt with in later patches. Let's also include plat/serial.h from common.h for all the board-*.c files. This allows making the include files local later on without patching these files again. Note that only minimal changes are done in this patch for the drivers/watchdog/omap_wdt.c driver to keep things compiling. Further patches are needed to eventually remove cpu_is_omap usage in the drivers. Also only minimal changes are done to sound/soc/omap/* to remove the unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's no need to include omap44xx.h. While at it, also sort some of the includes in the standard way. Cc: linux-watchdog@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jarkko Nikula <jarkko.nikula@bitmer.com> Cc: Liam Girdwood <lrg@ti.com> Acked-by: NWim Van Sebroeck <wim@iguana.be> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 10 7月, 2012 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 7月, 2012 2 次提交
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由 Santosh Shilimkar 提交于
Add OMAP5 SMP boot support using OMAP4 SMP code. The relevant code paths are runtime checked using cpu id Signed-off-by: NR Sricharan <r.sricharan@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
OMAP4 and OMAP5 share same WakeupGen IP with below few udpates on OMAP5. - Additional 32 interrupt support is added w.r.t OMAP4 design. - The AUX CORE boot registers are now made accessible from non-secure SW. - SAR offset are changed and PTMSYNC* registers are removed from SAR. Patch updates the WakeupGen code accordingly. Signed-off-by: NR Sricharan <r.sricharan@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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- 25 2月, 2012 1 次提交
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由 Tony Lindgren 提交于
There's no need to have these defines in plat/io.h. Note that we now need to ifdef omap_read/write calls as they will be available for omap1 only. While at it, clean up the includes to group them like they typically are grouped. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 12月, 2011 3 次提交
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由 Santosh Shilimkar 提交于
The SGI(Software Generated Interrupts) are not wakeup capable from low power states. This is known limitation on OMAP4 and needs to be worked around by using software forced clockdomain wake-up. CPU0 forces the CPU1 clockdomain to software force wakeup. More details can be found in OMAP4430 TRM - Version J Section : 4.3.4.2 Power States of CPU0 and CPU1 Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch retention (CSWR) is not supported by hardware design. The CPUx OFF mode isn't supported on OMAP4430 ES1.0 CPUx sleep code is common for hotplug, suspend and CPUilde. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
This patch exports APIs to get base address for GIC distributor, CPU interface, SCU and PL310 L2 Cache which are used in OMAP4 PM code. This was suggested by Kevin Hilman <khilman@ti.com> during OMAP4 PM code review. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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- 18 11月, 2011 1 次提交
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由 Tony Lindgren 提交于
As suggested by Russell King - ARM Linux <linux@arm.linux.org.uk>, there's no need to keep local prototypes in non-local headers. Add mach-omap1/common.h and mach-omap2/common.h and move the local prototypes there from plat/common.h and mach/omap4-common.h. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 10月, 2011 1 次提交
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由 Russell King 提交于
Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: <stable@kernel.org> Reported-by: NMark Salter <msalter@redhat.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 10月, 2011 1 次提交
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由 Tony Lindgren 提交于
Otherwise we can't do generic map_io as we currently rely on static mappings that work only because of arch_ioremap. Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 7月, 2011 1 次提交
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由 Stephen Boyd 提交于
If an ARM system has multiple cpus in the same socket and the kernel is booted with maxcpus=1, secondary cpus are possible but not present due to how platform_smp_prepare_cpus() is called. Since most typical ARM processors don't actually support physical hotplug, initialize the present map to be equal to the possible map in generic ARM SMP code. Also, always call platform_smp_prepare_cpus() as long as max_cpus is non-zero (0 means no SMP) to allow platform code to do any SMP setup. After applying this patch it's possible to boot an ARM system with maxcpus=1 on the command line and then hotplug in secondary cpus via sysfs. This is more in line with how x86 does things. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 5月, 2011 1 次提交
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由 Russell King 提交于
Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 12月, 2010 5 次提交
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由 Russell King 提交于
All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
We don't need this small function as well as scu_get_core_count() Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Ensure that the number of CPUs is sanity checked before setting the number of possible CPUs. This avoids any chance of overflowing the cpu_possible bitmap. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 12月, 2010 1 次提交
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由 Russell King 提交于
We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 12月, 2010 1 次提交
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由 Russell King 提交于
This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 8月, 2010 1 次提交
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由 Tony Lindgren 提交于
Otherwise we get the following error with omap3_defconfig and CONFIG_SMP: Error: selected processor does not support `sev' Signed-off-by: NTony Lindgren <tony@atomide.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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- 02 8月, 2010 1 次提交
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由 Santosh Shilimkar 提交于
This patch adds cpu hotplug support for OMAP4430. Only CPU inactive state is supported as a low power state in the basic hot-plug support Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 21 5月, 2010 1 次提交
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由 Santosh Shilimkar 提交于
This patch moves OMAP4 soc specific code from 4430sdp board file. The change is necessary so that newer board support can be added with minimal changes. This will be also problematic for multi-board, multi-omap builds. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 12月, 2009 2 次提交
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由 Santosh Shilimkar 提交于
The secondary cores wakes up in time so the wait loop is not necessary anymore. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Santosh Shilimkar 提交于
The AuxCoreBoot0 and AuxCoreBoot1 can be only accessed in secure mode. Replace the current code with secure monitor API's to access/modify these registers. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 21 10月, 2009 1 次提交
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由 Tony Lindgren 提交于
Move the remaining headers under plat-omap/include/mach to plat-omap/include/plat. Also search and replace the files using these headers to include using the right path. This was done with: #!/bin/bash mach_dir_old="arch/arm/plat-omap/include/mach" plat_dir_new="arch/arm/plat-omap/include/plat" headers=$(cd $mach_dir_old && ls *.h) omap_dirs="arch/arm/*omap*/ \ drivers/video/omap \ sound/soc/omap" other_files="drivers/leds/leds-ams-delta.c \ drivers/mfd/menelaus.c \ drivers/mfd/twl4030-core.c \ drivers/mtd/nand/ams-delta.c" for header in $headers; do old="#include <mach\/$header" new="#include <plat\/$header" for dir in $omap_dirs; do find $dir -type f -name \*.[chS] | \ xargs sed -i "s/$old/$new/" done find drivers/ -type f -name \*omap*.[chS] | \ xargs sed -i "s/$old/$new/" for file in $other_files; do sed -i "s/$old/$new/" $file done done for header in $(ls $mach_dir_old/*.h); do git mv $header $plat_dir_new/ done Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 10月, 2009 1 次提交
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由 Tony Lindgren 提交于
Use ioremap for omap4 L4 code Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 29 8月, 2009 1 次提交
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由 Tony Lindgren 提交于
Search and replace OMAP_IO_ADDRESS with OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS, and convert omap_read/write into a functions instead of a macros. Also rename OMAP_MPUIO_VBASE to OMAP1_MPUIO_VBASE. In the long run, most code should use ioremap + __raw_read/write instead. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 6月, 2009 1 次提交
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由 Santosh Shilimkar 提交于
This patch adds SMP platform files support for OMAP4430SDP. TI's OMAP4430 SOC is based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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