The gr3d engine renders images bottom-up. Allow buffers that are used
for 3D content to be marked as such and implement support in the display
controller to present them properly.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The gr2d and gr3d engines work more efficiently on buffers with a tiled
memory layout. Allow created buffers to be marked as tiled so that the
display controller can scan them out properly.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Since the .init() and .exit() functions are executed whenever the DRM
driver is loaded or unloaded, care must be taken not to use them for
resource allocation. Otherwise deferred probing cannot be used, since
the .init() and .exit() are not run at probe time. Similarly the code
that frees resources must be run at .remove() time. If it is run from
the .exit() function, it can release resources multiple times.

To handle this more consistently, rename the tegra_output_parse_dt()
function to tegra_output_probe() and introduce tegra_output_remove()
which can be used to free output-related resources.
Signed-off-by: NThierry Reding <treding@nvidia.com>

When the DRM driver is unloaded, all the associated resources must be
cleaned up and zeroed out. This is necessary because of the architecture
of the Tegra DRM driver, where not all subdrivers are unloaded along
with the DRM driver. Therefore device-managed managed won't be freed and
memory cannot be assumed to have been cleared (because it hasn't been
reallocated using kzalloc()) by the time the DRM driver is reloaded. It
is therefore necessary to zero out the structures to prevent strange
errors (such as slab corruptions) from occurring.
Signed-off-by: NThierry Reding <treding@nvidia.com>

In order to make subsystem-wide changes easier, move the Tegra DRM
driver back into the DRM tree.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Tegra DRM driver currently uses some infrastructure to defer the DRM
core initialization until all required devices have registered. The same
infrastructure can potentially be used by any other driver that requires
more than a single sub-device of the host1x module.

Make the infrastructure more generic and keep only the DRM specific code
in the DRM part of the driver. Eventually this will make it easy to move
the DRM driver part back to the DRM subsystem.
Signed-off-by: NThierry Reding <treding@nvidia.com>

This structure derives from host1x_client. DRM-specific fields are moved
from host1x_client to this structure, so that host1x_client can remain
agnostic of DRM.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Most of the included files are either not required or already included
by some other header file.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The host1x and Tegra DRM drivers are currently tightly coupled. Renaming
the structure marks the boundary more clearly.
Signed-off-by: NThierry Reding <treding@nvidia.com>

This was one level away from where I'd grepped.
Signed-off-by: NDave Airlie <airlied@redhat.com>

When using a base mode-set, honor changes in pixel-format since the core
doesn't explicitly check for them as long as they use the same depth.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

When a plane isn't in use it isn't attached to a CRTC and therefore the
DC registers aren't available for programming.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

While at it, also include the RGB565 pixelformat in the list of formats
supported by overlays.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>

This patch introduces a memory manager for tegra drm and moves
existing parts to use it. As cma framebuffer helpers can no more
be used, this patch adds also a separate framebuffer driver for
tegra.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Remove second host1x driver, and bind tegra-drm to the new host1x
driver. The logic to parse device tree and track clients is moved
to drm.c.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Both host1x and drm drivers have host1x structures. This patch
renames the host1x structure under drm to follow name host1x_drm.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Make drm part of host1x driver.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

bpp stores the number of bytes per pixel, but color expansion needs to
be enabled for less than 24 bits per pixel.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

The Tegra TRM says that the ACT_REQ and UPDATE fields cannot be
programmed at the same time so they are updated in two consecutive
writes instead.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

All the necessary support bits like .mode_set_base() and VBLANK are now
available, so page-flipping case easily be implemented on top.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Implement support for the VBLANK IOCTL. Note that Tegra is somewhat
special in this case because it doesn't use the generic IRQ support
provided by the DRM core (DRIVER_HAVE_IRQ) but rather registers one
interrupt handler for each display controller.

While at it, clean up the way that interrupts are enabled to ensure
that the VBLANK interrupt only gets enabled when required.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

The sequence for replacing the scanout buffer is much shorter than a
full mode change operation so implementing this callback considerably
speeds up cases where only a new framebuffer is to be scanned out.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Add support for the B and C planes which support RGB and YUV pixel
formats and can be used as overlays or hardware cursor. Currently 32-bit
XRGB as well as UYVY, YUV420 and YUV422 pixel formats are advertised.
Other formats should be easy to add but these are the most common ones
and should cover the majority of use-cases.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Tegra uses the CMA FB helpers so framebuffers passed to the driver need
to use the corresponding functions to access the underlying GEM objects.

This used to work because struct tegra_framebuffer was sufficiently
similar to struct drm_fb_cma but that isn't guaranteed to stay that way.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Migrate Tegra clock support to drivers/clk/tegra, this involves
moving:
1. definition of tegra_cpu_car_ops to clk.c
2. definition of reset functions to clk-peripheral.c
3. change parent of cpu clock.
4. Remove legacy clock initialization.
5. Initialize clocks using DT.
6. Remove all instance of mach/clk.h
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
[swarren: use to_clk_periph_gate().]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.

devm_ioremap_resource() provides its own error messages so all explicit
error messages can be removed from the failure code paths.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Cc: David Airlie <airlied@linux.ie>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This reverts commit 83c0bcb6.

Lucas pointed out this was a mistake, and I missed the discussion,
so just revert it out to save a rebase.
Signed-off-by: NDave Airlie <airlied@redhat.com>

The intention is to program exactly WIN_A, not WIN_A and possibly
others.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Window properties are programmed through a shared aperture and have to
happen atomically. Also we do the read-update-write dance on some of the
shared regs.
To make sure that different functions don't stumble over each other
protect the register access with a mutex.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Fixes wrong picture offset observed when using HDMI output with a
Technisat HD TV.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Acked-by: NMark Zhang <markz@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Add support for host1x, the display controllers and HDMI on the Tegra30
SoC.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Instead of using the stride derived from the display mode, use the pitch
associated with the currently active framebuffer. This fixes a bug where
the LCD display content would be skewed when enabling HDMI with a video
mode different from that of the LCD.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This commit adds a KMS driver for the Tegra20 SoC. This includes basic
support for host1x and the two display controllers found on the Tegra20
SoC. Each display controller can drive a separate RGB/LVDS output.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMark Zhang <markz@nvidia.com>
Reviewed-by: NMark Zhang <markz@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Tested-and-acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>