1. 27 1月, 2015 4 次提交
  2. 15 1月, 2015 1 次提交
    • M
      ath10k: prevent fw reg dump spam · a2fa8800
      Michal Kazior 提交于
      Originally the explicit fw register dump was added
      to wait_for_target_init because interrupts are
      masked early during power_up.
      
      Due to some changes in power_up/reset sequences
      sometimes when fw crashed ath10k would print the
      dump more than once via hif_stop -> warm_reset ->
      wait_for_target_init, possibly with different
      values each.
      
      Prevent this by doing the explicit fw register
      dump only during power_up instead of
      wait_for_target_init.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      a2fa8800
  3. 08 12月, 2014 1 次提交
  4. 01 12月, 2014 3 次提交
  5. 26 11月, 2014 2 次提交
    • Y
      ath10k: add memory dump debugfs interface · 9f65ad25
      Yanbo Li 提交于
      Add mem_val debugfs file for dumping the firmware (target) memory and also for
      writing to the memory. The firmware memory is accessed through one file which
      uses position of the file as the firmware memory address. For example, with dd
      use skip parameter for the address.
      
      Beucase target memory width is 32 bits it's strongly recommended to use
      blocksize divisable with 4 when using this interface. For example, when using
      dd use bs=4 to set the block size to 4 and remember to divide both count and
      skip values with four.
      
      To read 4 kB chunk from address 0x400000:
      
      dd if=mem_value bs=4 count=1024 skip=1048576 | xxd -g1
      
      To write value 0x01020304 to address 0x400400:
      
      echo 0x01020304 | xxd -r | dd of=mem_value bs=4 seek=1048832
      
      To read 4 KB chunk of memory and then write back after edit:
      
      dd if=mem_value of=tmp.bin bs=4 count=1024 skip=1048576
      emacs tmp.bin
      dd if=tmp.bin of=mem_value bs=4 count=1024 seek=1048576
      Signed-off-by: NYanbo Li <yanbol@qti.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      9f65ad25
    • Y
      ath10k: add register access debugfs interface · 077a3804
      Yanbo Li 提交于
      Debugfs files reg_addr and reg_val are used for reading and writing to the
      firmware (target) registers. reg_addr contains the address to be accessed,
      which also needs to be set first, and reg_value is when used for reading and
      writing the actual value in ASCII.
      
      To read a value from the firmware register 0x100000:
      
      # echo 0x100000 > reg_addr
      # cat reg_value
      0x00100000:0x000002d3
      
      To write value 0x2400 to address 0x100000:
      
      # echo 0x100000 > reg_addr
      # echo  0x2400 > reg_value
      #
      Signed-off-by: NYanbo Li <yanbol@qti.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      077a3804
  6. 04 11月, 2014 1 次提交
  7. 31 10月, 2014 5 次提交
  8. 23 10月, 2014 3 次提交
  9. 21 10月, 2014 1 次提交
  10. 08 10月, 2014 1 次提交
  11. 01 10月, 2014 1 次提交
  12. 26 9月, 2014 2 次提交
  13. 18 9月, 2014 4 次提交
  14. 02 9月, 2014 3 次提交
    • M
      ath10k: remove diag_*_access functions · 9e264945
      Michal Kazior 提交于
      Remove the ugly _access functions. Being explicit
      is a good thing.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      9e264945
    • M
      ath10k: kill tasklets after free_irq · 21396271
      Michal Kazior 提交于
      Commit 5c771e74
      introduced a regression. On some systems spurious
      interrupts could schedule a tasklet while tearing
      down leading to, e.g.:
      
       BUG: unable to handle kernel paging request at fe589030
       IP: [<c1316fb0>] ioread32+0x30/0x40
       ...
       Call Trace:
        [<fe576c1b>] ath10k_pci_tasklet+0x1b/0x60 [ath10k_pci]
        [<c1053fbe>] tasklet_action+0x9e/0xb0
        [<c10534f1>] __do_softirq+0xf1/0x3f0
        [<c1053400>] ? ftrace_raw_event_irq_handler_entry+0xa0/0xa0
        [<c1004999>] do_softirq_own_stack+0x29/0x40
        <IRQ>
        [<c1053a76>] irq_exit+0x86/0xb0
       ...
        [<c132d522>] do_pci_disable_device+0x52/0x60
        [<c132d57f>] pci_disable_device+0x4f/0xb0
        [<c132a961>] ? __pci_set_master+0x51/0x80
        [<fe5740b3>] ath10k_pci_release+0x33/0x40 [ath10k_pci]
        [<fe575d4b>] ath10k_pci_remove+0x7b/0x90 [ath10k_pci]
      Reported-by: NKalle Valo <kvalo@qca.qualcomm.com>
      Tested-by: NKalle Valo <kvalo@qca.qualcomm.com>
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      21396271
    • M
      ath10k: re-enable interrupts properly in hw recovery · e75db4e3
      Michal Kazior 提交于
      Recent changes done to start/restart sequences
      broke hw recovery in some hw configurations. The
      pci transport was stopped twice however due to a
      workaround in the pci disabling code the
      disable/enable for first msi interrupt was not
      balanced. This ended up with irqs not being
      properly re-enabled and the following print out
      during recovery:
      
       ath10k: failed to receive control response completion, polling..
       ath10k: Service connect timeout: -110
       ath10k: Could not init core: -110
      
      Legacy interrupt mode was unaffected while msi
      ranged mode would be partially crippled (it would
      miss fw indication interrupts but otherwise it
      worked fine).
      
      This fixes completely broken fw recovery for a
      single msi interrupt mode and fixes subsequent fw
      crash reports for msi range interrupt mode.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      e75db4e3
  15. 27 8月, 2014 5 次提交
  16. 25 8月, 2014 3 次提交