- 13 5月, 2016 4 次提交
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由 Arnaud Mouiche 提交于
If the capture is already running while playback is started, it is highly probable (>80% in a 8 channels scenario) that samples are lost between the DMA and TX fifo. The reason is that SIER.TDMAE is set before STCR.TFEN0, leaving a time window where the FIFO doesn't receive the samples written by the DMA. This particular case happened only if capture is already enabled as SCR.SSIEN is already set at the playback startup instant. Signed-off-by: NArnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Tested-by: NCaleb Crome <caleb@crome.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Arnaud Mouiche 提交于
Most of functions only receive the ssi_private reference and don't have a knowledge of 'dev' pointer, even for debug purpose. Signed-off-by: NArnaud Mouiche <arnaud.mouiche@invoxia.com> Tested-by: NCaleb Crome <caleb@crome.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Arnaud Mouiche 提交于
im6sl reference manual 47.7.4: " Bit clock - Used to serially clock the data bits in and out of the SSI port. This clock is either generated internally (from SSI's sys clock) or taken from external clock source (through the Tx/Rx clock ports). [...] Care should be taken to ensure that the bit clock frequency (either internally generated by dividing the SSI's sys clock or sourced from external device through Tx/Rx clock ports) is never greater than 1/5 of the ipg_clk (from CCM) frequency. " Since, in master mode, the sysclk is a multiple of bitclk, we can easily reach a high sysclk value, whereas keeping a reasonable bitclk. ex: 8ch x 16bit x 48kHz = 6144000, requires a 24576000 sysclk (PM=1) yet ipg_clk/5 = 66Mhz/5 = 13.2 Signed-off-by: NArnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Tested-by: NCaleb Crome <caleb@crome.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Arnaud Mouiche 提交于
The max number of slots in TDM mode is 32: - Frame Rate Divider Control is a 5bit value - Time slot mask registers control 32 slots. Signed-off-by: NArnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Tested-by: NCaleb Crome <caleb@crome.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 09 3月, 2016 1 次提交
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由 Luis R. Rodriguez 提交于
Rename dma_*_writecombine() to dma_*_wc(), so that the naming is coherent across the various write-combining APIs. Keep the old names for compatibility for a while, these can be removed at a later time. A guard is left to enable backporting of the rename, and later remove of the old mapping defines seemlessly. Build tested successfully with allmodconfig. The following Coccinelle SmPL patch was used for this simple transformation: @ rename_dma_alloc_writecombine @ expression dev, size, dma_addr, gfp; @@ -dma_alloc_writecombine(dev, size, dma_addr, gfp) +dma_alloc_wc(dev, size, dma_addr, gfp) @ rename_dma_free_writecombine @ expression dev, size, cpu_addr, dma_addr; @@ -dma_free_writecombine(dev, size, cpu_addr, dma_addr) +dma_free_wc(dev, size, cpu_addr, dma_addr) @ rename_dma_mmap_writecombine @ expression dev, vma, cpu_addr, dma_addr, size; @@ -dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size) +dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size) We also keep the old names as compatibility helpers, and guard against their definition to make backporting easier. Generated-by: Coccinelle SmPL Suggested-by: NIngo Molnar <mingo@kernel.org> Signed-off-by: NLuis R. Rodriguez <mcgrof@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: airlied@linux.ie Cc: akpm@linux-foundation.org Cc: benh@kernel.crashing.org Cc: bhelgaas@google.com Cc: bp@suse.de Cc: dan.j.williams@intel.com Cc: daniel.vetter@ffwll.ch Cc: dhowells@redhat.com Cc: julia.lawall@lip6.fr Cc: konrad.wilk@oracle.com Cc: linux-fbdev@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: luto@amacapital.net Cc: mst@redhat.com Cc: tomi.valkeinen@ti.com Cc: toshi.kani@hp.com Cc: vinod.koul@intel.com Cc: xen-devel@lists.xensource.com Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 22 2月, 2016 2 次提交
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由 Maciej S. Szmigiero 提交于
There is no guarantee that on fsl_ssi module load SSI registers will have their power-on-reset values. In fact, if the driver is reloaded the values in registers will be whatever they were set to previously. However, the cache needs to be fully populated at probe time to avoid non-atomic allocations during register access. Special case here is imx21-class SSI, since according to datasheet it don't have SACC{ST,EN,DIS} regs. This fixes hard lockup on fsl_ssi module reload, at least in AC'97 mode. Fixes: 05cf2379 ("ASoC: fsl_ssi: Add driver suspend and resume to support MEGA Fast") Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name> Tested-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Fabio Estevam 提交于
Commit 5c408fee ("ASoC: fsl_ssi: remove explicit register defaults") causes the driver to fail to probe: fsl-ssi-dai 2028000.ssi: No cache defaults, reading back from HW fsl-ssi-dai 2028000.ssi: Failed to init register map fsl-ssi-dai: probe of 2028000.ssi failed with error -22 , so revert this commit. Reported-by: NMika Penttilä <mika.penttila@nextfour.com> Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 05 2月, 2016 1 次提交
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由 Felipe F. Tonello 提交于
add cs4271 and cs42727 support for fsl-asoc-card Signed-off-by: NFelipe F. Tonello <eu@felipetonello.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 04 2月, 2016 1 次提交
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由 Nicolin Chen 提交于
There are a pair of warnings when ASRC is absent in the DTB: fsl-asoc-card sound: ASoC: no source widget found for ASRC-Playback fsl-asoc-card sound: ASoC: Failed to add route ASRC-Playback -> direct -> CPU-Playback fsl-asoc-card sound: ASoC: no sink widget found for ASRC-Capture fsl-asoc-card sound: ASoC: Failed to add route CPU-Capture -> direct -> ASRC-Capture This is because the driver is still trying to add DAPM routes for ASRC even if it doesn't exist on that platform. The warnings are harmless but it might be annoying. So this patch drops the DAPM routes of ASRC when it's absent in the DAI link. Signed-off-by: NNicolin Chen <nicolinc@nvidia.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 27 1月, 2016 1 次提交
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由 Lars-Peter Clausen 提交于
When registering a ASoC card the driver data of the parent device is set to point to the card. This driver data is used in the snd_soc_suspend()/resume() callbacks. The imx-spdif driver overwrites the driver data with custom data which causes snd_soc_suspend() to crash. Since the custom driver is not used anywhere simply deleting the line which sets the custom driver data fixes the issue. Fixes: 43ac9469 ("ASoC: imx-spdif: add snd_soc_pm_ops for spdif machine driver") Tested-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 25 1月, 2016 1 次提交
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由 Maciej S. Szmigiero 提交于
There is no guarantee that on fsl_ssi module load SSI registers will have their power-on-reset values. In fact, if the driver is reloaded the values in registers will be whatever they were set to previously. However, the cache needs to be fully populated at probe time to avoid non-atomic allocations during register access. Special case here is imx21-class SSI, since according to datasheet it don't have SACC{ST,EN,DIS} regs. This fixes hard lockup on fsl_ssi module reload, at least in AC'97 mode. Fixes: 05cf2379 ("ASoC: fsl_ssi: Add driver suspend and resume to support MEGA Fast") Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name> Tested-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 23 1月, 2016 2 次提交
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由 Xiubo Li 提交于
Since msleep() will sleep longer than intended time for values less than 20ms, this patch allows the use of usleep_range for just 1ms. usleep_range is a finer precision implementation of msleep and is designed to be a drop-in replacement for udelay where a precise sleep/busy-wait is unnecessary. More details see Documentation/timers/timers-howto.txt. Signed-off-by: NXiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Xiubo Li 提交于
Since msleep() will sleep longer than intended time for values less than 20ms, this patch allows the use of usleep_range for just 1ms. usleep_range is a finer precision implementation of msleep and is designed to be a drop-in replacement for udelay where a precise sleep/busy-wait is unnecessary. More details see Documentation/timers/timers-howto.txt. Signed-off-by: NXiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 10 1月, 2016 2 次提交
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由 Maciej S. Szmigiero 提交于
Mark some registers precious since their reads have side effects (like clearing flags). Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Maciej S. Szmigiero 提交于
SACNT register should be marked volatile since its WR and RD bits are cleared by SSI after completing the relevant operation. This unbreaks AC'97 register access. Fixes: 05cf2379 ("ASoC: fsl_ssi: Add driver suspend and resume to support MEGA Fast") Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 05 1月, 2016 1 次提交
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由 Zidan Wang 提交于
The register ASRCFG is volatile, but some bits need to be recovered after suspend/resume. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 25 12月, 2015 1 次提交
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由 Geliang Tang 提交于
Use to_platform_device() instead of open-coding it. Signed-off-by: NGeliang Tang <geliangtang@163.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 23 12月, 2015 3 次提交
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由 Maciej S. Szmigiero 提交于
fsl_ssi uses different stream names ("AC97 Playback" / "AC97 Capture") in AC'97 mode so in this case fsl-asoc-card route map should also be using them. Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Zidan Wang 提交于
Add 8kHz, 11.025kHz, 16kHz, 22.05kHz output sample rate support. According referance menual, "Limited support for the case when output sampling rates is between 8kHz and 30kHz. The limitation is the supported ratio (Fsin/Fsout) range as between 1/24 to 8." Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Julia Lawall 提交于
Add NULL test on call to devm_kzalloc. The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x; @@ * x = devm_kzalloc(...); ... when != x == NULL *x // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 18 12月, 2015 1 次提交
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由 Zidan Wang 提交于
After several open/close sai test with ctrl+c, there will be I/O error. The SAI can't work anymore, can't recover. There will be no frame clock. With adding the software reset in trigger stop, the issue can be fixed. This is a hardware bug/errata and reset is the only option. According to the reference manual, the software reset doesn't reset any control register but only internal hardware logics such as bit clock generator, status flags, and FIFO pointers. (Our purpose is just to reset the clock generator while the software reset is the only way to do that.) Since slave mode doesn't use the clock generator, only apply the reset procedure to the master mode. For asynchronous mode, TX will not be reset when RX is still running. In this case, i can't reproduce this issue. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 09 12月, 2015 1 次提交
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由 Arnd Bergmann 提交于
We get a warning for the imx-pcm-fiq driver when CONFIG_LPAE is enabled on ARM, because dma_addr_t is 64-bit then: sound/soc/fsl/imx-pcm-fiq.c: In function 'snd_imx_pcm_mmap': sound/soc/fsl/imx-pcm-fiq.c:223:107: warning: format '%x' expects argument of type 'unsigned int', but argument 6 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] This changes the printk to use the correct format string for printing a dma_addr_t. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 25 11月, 2015 6 次提交
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由 Shengjiu Wang 提交于
ASRC need to enable the spba clock, when sdma is using share peripheral script. In this case, there is two spba master port is used, if don't enable the clock, the spba bus will have arbitration issue, which may cause read/write wrong data from/to ASRC registers Signed-off-by: NShengjiu Wang <shengjiu.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Shengjiu Wang 提交于
SPDIF need to enable the spba clock, when sdma is using share peripheral script. In this case, there is two spba master port is used, if don't enable the clock, the spba bus will have arbitration issue, which may cause read/write wrong data from/to SPDIF registers. Signed-off-by: NShengjiu Wang <shengjiu.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Shengjiu Wang 提交于
ESAI need to enable the spba clock, when sdma is using share peripheral script. In this case, there is two spba master port is used, if don't enable the clock, the spba bus will have arbitration issue, which may cause read/write wrong data from/to ESAI registers. Signed-off-by: NShengjiu Wang <shengjiu.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Zidan Wang 提交于
using params_width function to simplify code. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Zidan Wang 提交于
Add tdm slots operation support. If tdm slots and slot width have been configured in machine driver, we should use these values. Otherwise, using relevant channels and word length to set slots and slot width. SAI will generate BCLK depends on sample rate, slots and slot width. And there may be unused BCLK cycles before each LRCLK transition. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Arnd Bergmann 提交于
A new randconfig build failure shows that the fsl-asoc-card module must not be built-in when the AC97 driver is a loadable module: sound/built-in.o: In function `fsl_asoc_card_late_probe': :(.text+0x571d8): undefined reference to `snd_ac97_update_bits' I couldn't come up with a nice solution, so this adds another dependency on "X || !X", which is the Kconfig way of saying that we have an optional dependency on something that might be a loadable module. Fixes: 50760cad ("ASoC: fsl-asoc-card: add AC'97 support") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 21 11月, 2015 1 次提交
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由 Vinod Koul 提交于
sound card rtd was an array and was updated to a list so update the driver to use a list Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 19 11月, 2015 1 次提交
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由 Mengdong Lin 提交于
Vendor drivers no longer access a DAI link's runtime by the link index but by matching the link name via snd_soc_get_pcm_runtime(). We assume each DAI link has a unique name. This is preparation for changing runtimes from an array to a list later. Vendor drivers changed: sound/soc/fsl/fsl-asoc-card.c sound/soc/fsl/imx-wm8962.c sound/soc/pxa/mioa701_wm9713.c sound/soc/samsung/bells.c sound/soc/samsung/littlemill.c sound/soc/samsung/odroidx2_max98090.c sound/soc/samsung/snow.c sound/soc/samsung/speyside.c sound/soc/samsung/tobermory.c sound/soc/tegra/tegra_wm8903 Signed-off-by: NMengdong Lin <mengdong.lin@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 18 11月, 2015 2 次提交
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由 Zidan Wang 提交于
For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4), RCR5(TCR5) and RMR(TMR) for playback(capture), or there will be sync error sometimes. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Zidan Wang 提交于
In fsl_sai_set_bclk function, we should not set bclk for Tx/Rx Synchronous with another SAI mode. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 16 11月, 2015 4 次提交
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由 Zidan Wang 提交于
using macro for default register map Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Zidan Wang 提交于
STL and STR registers are writable and not readable. So they are non volatile. Remove them from volatile list, and add default register value for them. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Zidan Wang 提交于
FSL_SAI_TDR register is writable and not readable. According to regmap_volatile() function, if FSL_SAI_TDR want to be volatile, it should be readable. So we should remove FSL_SAI_TDR from volatile register list. If the flat cache don't have default register map, when do regcache_sync operation, the non volatile and writable registers will be synchronised to 0. FSL_SAI_TDR reigster will be written a 0 and cause channel swap. So add default register map for flat cache, and such register will not be written. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Zidan Wang 提交于
ETDR and TX0~5 registers are writable and not readable. So they are non volatile. Remove them from volatile list, and add default register value for them. Signed-off-by: NZidan Wang <zidan.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 26 10月, 2015 2 次提交
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由 Stefan Agner 提交于
When using the Rx clock for both, transmitter and receiver, the transmitter needs to be set to synchronous with receiver. This reverts 855675f6 ("ASoC: fsl_sai: Set SYNC bit of TCR2 to Asynchronous Mode"), which, judiging from the commit log, seems to mixed up between the two synchronous modes: The boolean sai->synchronous[TX] is indicating wheather the SAI should work in Rx synchronous mode (sync Tx with Rx), hence if the value is true, the SYNC field of TCR2 needs to be set to 0x1 ("Synchronous with receiver"). Signed-off-by: NStefan Agner <stefan@agner.ch> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Nicolin Chen 提交于
Change them to #ifdef as CONFIG_PM_SLEEP might not be defined at all. Reported-by: Nkbuild test robot <fengguang.wu@intel.com> Signed-off-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 23 10月, 2015 2 次提交
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由 Lars-Peter Clausen 提交于
The rate constraints in this driver are shared between all device instances. It should not be (and is not) modified at runtime, so make them const. While we are at it also change the type of the rates array from u32 to unsigned int. While both resolve to the same type, u32 is usually used to empathize that the value is for a 32-bit hardware register or similar which makes it slightly confusing in this context. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Maciej S. Szmigiero 提交于
Add AC'97 support to fsl-asoc-card using generic ASoC AC'97 CODEC. The SSI controller will silently enable any TX AC'97 slots that have their bits set in SLOTREQ received from CODEC and then will redirect some of playback samples there. That's why it is important to make sure that any of CODEC playback slots that can pull samples are set to slots 3/4 (standard PCM playback slots). Currently, this applies to S/PDIF slots as they were seen to pull samples sometimes even with S/PDIF output being disabled. Signed-off-by: NMaciej Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: NMark Brown <broonie@kernel.org>
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