1. 30 8月, 2016 1 次提交
  2. 06 7月, 2016 3 次提交
  3. 01 7月, 2016 1 次提交
  4. 10 5月, 2016 2 次提交
  5. 30 3月, 2016 5 次提交
  6. 20 3月, 2016 1 次提交
  7. 28 2月, 2016 7 次提交
  8. 01 2月, 2016 2 次提交
    • S
      iwlwifi: mvm: support rss queues configuration command · 43413a97
      Sara Sharon 提交于
      9000 series supports multi-queue rx. The hardware needs
      to be configured with the hash functions to perform and
      indirection table that maps hash results to the relevant
      CPUs\queues.
      Support this configuration.
      Add debugfs hook to configure the indirection table in
      order to enable performance analysis. The configuration
      is stateless, receives a partial or full pattern and sends
      the command to the firmware.
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      43413a97
    • S
      iwlwifi: mvm: support beacon storing · 0db056d3
      Sara Sharon 提交于
      Currently firmware is configured to filter out beacons. In case
      a beacon was changed - it is waking the host.
      However, some vendors change their IEs frequently without any
      significant change, and redundant wakeups are triggered as a
      result.
      As a solution disable beacon filtering when entering d0i3.
      Instead, firmware will store the latest beacon and upon exiting
      d0i3 it will send it up to the host, so the host can act upon
      changes (if there were any).
      This beacon will arrive as a dedicated notification - support it
      as well.
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      0db056d3
  9. 08 1月, 2016 1 次提交
  10. 20 12月, 2015 1 次提交
  11. 13 12月, 2015 1 次提交
  12. 02 12月, 2015 2 次提交
  13. 18 11月, 2015 1 次提交
  14. 25 10月, 2015 1 次提交
  15. 05 10月, 2015 1 次提交
  16. 21 9月, 2015 2 次提交
  17. 28 8月, 2015 1 次提交
  18. 05 8月, 2015 2 次提交
    • M
      iwlwifi: mvm: Add FW paging mechanism for the UMAC on SDIO · e1120187
      Matti Gottlieb 提交于
      Family 8000 products has 2 embedded processors, the first
      known as LMAC (lower MAC) and implements the functionality from
      previous products, the second one is known as UMAC (upper MAC)
      and is used mainly for driver offloads as well as new features.
      The UMAC is typically “less” real-time than the LMAC and is used
      for higher level controls.
      The UMAC's code/data size is estimated to be in the mega-byte arena,
      taking into account the code it needs to replace in the driver and
      the set of new features.
      
      In order to allow the UMAC to execute code that is bigger than its code
      memory, we allow the UMAC embedded processor to page out code pages on
      DRAM.
      
      When the device is slave on the bus(SDIO) the driver saves the UMAC's
      image pages in blocks of 32K in the DRAM and sends the layout of the
      pages to the FW. When the FW wants load / unload pages, it creates an
      interrupt,	and the driver uploads / downloads the page to an address in
      the a specific address on the device's memory.
      
      The driver can support up to 1 MB of pages.
      
      Add paging mechanism for the UMAC on SDIO in order to allow the program to
      use a larger virtual space while using less physical memory on the device
      itself.
      Signed-off-by: NMatti Gottlieb <matti.gottlieb@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      e1120187
    • M
      iwlwifi: mvm: Add FW paging mechanism for the UMAC on PCI · a6c4fb44
      Matti Gottlieb 提交于
      Family 8000 products has 2 embedded processors, the first
      known as LMAC (lower MAC) and implements the functionality from
      previous products, the second one is known as UMAC (upper MAC)
      and is used mainly for driver offloads as well as new features.
      The UMAC is typically “less” real-time than the LMAC and is used
      for higher level controls.
      The UMAC's code/data size is estimated to be in the mega-byte arena,
      taking into account the code it needs to replace in the driver and
      the set of new features.
      
      In order to allow the UMAC to execute code that is bigger than its code
      memory, we allow the UMAC embedded processor to page out code pages on
      DRAM.
      
      When the device is master on the bus(PCI) the driver saves the UMAC's
      image pages in blocks of 32K in the DRAM and sends the layout of the
      pages to the FW. The FW can load / unload the pages on its own.
      
      The driver can support up to 1 MB of pages.
      
      Add paging mechanism for the UMAC on PCI in order to allow the program
      to use a larger virtual space while using less physical memory on the
      device.
      Signed-off-by: NEran Harary <eran.harary@intel.com>
      Signed-off-by: NMatti Gottlieb <matti.gottlieb@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      a6c4fb44
  19. 04 8月, 2015 2 次提交
  20. 03 6月, 2015 2 次提交
  21. 28 5月, 2015 1 次提交