- 06 10月, 2015 1 次提交
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由 Matt Fleming 提交于
Move out the x86-specific tests into tools/perf/arch/x86/tests and define an 'arch_tests' array, which is the list of tests that only apply to the build architecture. We can also now begin to get rid of some of the #ifdef code that is present in the generic perf tests. Signed-off-by: NMatt Fleming <matt.fleming@intel.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kanaka Juvva <kanaka.d.juvva@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Vikas Shivappa <vikas.shivappa@intel.com> Cc: Vince Weaver <vince@deater.net> Link: http://lkml.kernel.org/n/tip-9s68h4ptg06ah0lgnjz55mqn@git.kernel.orgSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
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- 04 9月, 2015 4 次提交
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由 Adrian Hunter 提交于
Add xsavec, xsaves and xrstors to the op code map and the perf tools new instructions test. To run the test: $ tools/perf/perf test "x86 ins" 39: Test x86 instruction decoder - new instructions : Ok Or to see the details: $ tools/perf/perf test -v "x86 ins" 2>&1 | grep 'xsave\|xrst' For information about xsavec, xsaves and xrstors, refer the Intel SDM. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Acked-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Qiaowei Ren <qiaowei.ren@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1441196131-20632-8-git-send-email-adrian.hunter@intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
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由 Adrian Hunter 提交于
Intel Architecture Instruction Set Extensions Programing Reference (Oct 2014) describes 3 new memory instructions, namely clflushopt, clwb and pcommit. Add them to the op code map and the perf tools new instructions test. e.g. $ tools/perf/perf test "x86 ins" 39: Test x86 instruction decoder - new instructions : Ok Or to see the details: $ tools/perf/perf test -v "x86 ins" Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Acked-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Qiaowei Ren <qiaowei.ren@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1441196131-20632-6-git-send-email-adrian.hunter@intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
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由 Adrian Hunter 提交于
Intel SHA Extensions are explained in the Intel Architecture Instruction Set Extensions Programing Reference (Oct 2014). There are 7 new instructions. Add them to the op code map and the perf tools new instructions test. e.g. $ tools/perf/perf test "x86 ins" 39: Test x86 instruction decoder - new instructions : Ok Or to see the details: $ tools/perf/perf test -v "x86 ins" 2>&1 | grep sha Committer note: 3 lines of details, for the curious: $ perf test -v "x86 ins" 2>&1 | grep sha256msg1 | tail -3 Decoded ok: 0f 38 cc 84 08 78 56 34 12 sha256msg1 0x12345678(%rax,%rcx,1),%xmm0 Decoded ok: 0f 38 cc 84 c8 78 56 34 12 sha256msg1 0x12345678(%rax,%rcx,8),%xmm0 Decoded ok: 44 0f 38 cc bc c8 78 56 34 12 sha256msg1 0x12345678(%rax,%rcx,8),%xmm15 $ Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Acked-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Qiaowei Ren <qiaowei.ren@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1441196131-20632-5-git-send-email-adrian.hunter@intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
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由 Adrian Hunter 提交于
Add a new test titled: Test x86 instruction decoder - new instructions The purpose of this test is to check the instruction decoder after new instructions have been added. Initially, MPX instructions are tested which are already supported, but the definitions in x86-opcode-map.txt will be tweaked in a subsequent patch, after which this test can be run to verify those changes. The data for the test comes from assembly language instructions in insn-x86-dat-src.c which is converted into bytes by the scripts gen-insn-x86-dat.sh and gen-insn-x86-dat.awk, and included into the test program insn-x86.c as insn-x86-dat-32.c and insn-x86-dat-64.c. The conversion is not done as part of the perf tools build because the test data must be under (git) change control in order for the test to be repeatably-correct. Also it may require a recent version of binutils. Commiter notes: Using it: # perf test decoder 39: Test x86 instruction decoder - new instructions : Ok # perf test -v decoder 39: Test x86 instruction decoder - new instructions : --- start --- test child forked, pid 21970 Decoded ok: 0f 31 rdtsc Decoded ok: f3 0f 1b 00 bndmk (%eax),%bnd0 Decoded ok: f3 0f 1b 05 78 56 34 12 bndmk 0x12345678,%bnd0 Decoded ok: f3 0f 1b 18 bndmk (%eax),%bnd3 <SNIP> Decoded ok: f2 e9 00 00 00 00 bnd jmpq 402 <main+0x402> Decoded ok: f2 e9 00 00 00 00 bnd jmpq 408 <main+0x408> Decoded ok: 67 f2 ff 21 bnd jmpq *(%ecx) Decoded ok: f2 0f 85 00 00 00 00 bnd jne 413 <main+0x413> test child finished with 0 ---- end ---- Test x86 instruction decoder - new instructions: Ok # Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Acked-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by: NArnaldo Carvalho de Melo <acme@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Qiaowei Ren <qiaowei.ren@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1441196131-20632-3-git-send-email-adrian.hunter@intel.comSigned-off-by: NArnaldo Carvalho de Melo <acme@redhat.com>
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