Each MU has four pairs of rx/tx data register with four rx/tx interrupts
which can also be used as a separate channel.
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

The Messaging Unit module enables two processors within
the SoC to communicate and coordinate by passing messages
(e.g. data, status and control) through the MU interface.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

This adds documentation for the MediaTek Global Command Engine (GCE) unit
found in MT8173 SoCs.
Signed-off-by: NHoulong Wei <houlong.wei@mediatek.com>
Signed-off-by: NHS Liao <hs.liao@mediatek.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Secure Proxy is another communication scheme in Texas Instrument's
devices intended to provide an unique communication path from various
processors in the System on Chip(SoC) to a central System Controller.

Secure proxy is, in effect, an evolution of current generation Message
Manager hardware block found in K2G devices. However the following
changes have taken place:

Secure Proxy instance exposes "threads" or "proxies" which is
primary representation of "a" communication channel. Each thread is
preconfigured by System controller configuration based on SoC usage
requirements. Secure proxy by itself represents a single "queue" of
communication but allows the proxies to be independently operated.

Each Secure proxy thread can uniquely have their own error and threshold
interrupts allowing for more fine control of IRQ handling.

Provide an hardware description of the same for device tree
representation.

See AM65x Technical Reference Manual (SPRUID7, April 2018)
for further details: http://www.ti.com/lit/pdf/spruid7Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Include SDM845 APSS shared to the list of possible bindings
Signed-off-by: NSibi Sankar <sibis@codeaurora.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

The Qualcomm MSM8998 platform has a APCS HMSS GLOBAL block, add the
compatible for this.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Add a binding for the STMicroelectronics STM32 IPCC block exposing a
mailbox mechanism between two processors.
Signed-off-by: NFabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: NLudovic Barre <ludovic.barre@st.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Introduce a binding for the Hi3660 mailbox controller, the mailbox is
used within application processor (AP), communication processor (CP),
HIFI and MCU, etc.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLeo Yan <leo.yan@linaro.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Many users of the mailbox controllers depend on the shared memory
between the two end points to exchange the main data while using simple
doorbell mechanism to alert the end points of the presence of a message.

This patch defines device tree bindings to represent such shared memory
in a generic way.

Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>

Update the binding documentation for APCS to mention that the APCS
hardware block also expose a clock controller functionality.

The APCS clock controller is a mux and half-integer divider. It has the
main CPU PLL as an input and provides the clock for the application CPU.
Signed-off-by: NGeorgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

DT unit addresses should be lower case hex. Fix all the
binding examples.

Converted with the following command from Krzysztof Kozlowski:

sed -e 's/@\([a-fA-F0-9_-]*\) {/@\L\1 {/' -i $(find Documentation/devicetree/bindings -name '*.txt')
Signed-off-by: NRob Herring <robh@kernel.org>

Message Manager's mailbox interrupts are queue based and not proxy
specific. The interrupt names are wrong in the binding, however
correctly reflected in the example provided. Remove the relation
to proxy ID in the documentation of binding. Existing device tree
descriptions follow the correct conventions already and documentation
update has been missed.
Signed-off-by: NNishanth Menon <nm@ti.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NRob Herring <robh@kernel.org>

Improve the binding example by removing all the leading 0x to fix the
following dtc warnings:

Warning (unit_address_format): Node /XXX unit name should not have leading "0x"

Converted using the following command:

find Documentation/devicetree/bindings -name "*.txt" -exec sed -i -e 's/([^ ])\@0x([0-9a-f])/$1\@$2/g' {} +

This is a follow up to commit 48c926cdSigned-off-by: NMathieu Malaterre <malat@debian.org>
Signed-off-by: NRob Herring <robh@kernel.org>

Improve the binding example by removing all the leading zeros to fix the
following dtc warnings:

Warning (unit_address_format): Node /XXX unit name should not have leading 0s

Converted using the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"`

Some unnecessary changes were manually fixed.
Signed-off-by: NMarco Franchi <marco.franchi@nxp.com>
Signed-off-by: NRob Herring <robh@kernel.org>

Introduce a binding for the Qualcomm APCS global block, exposing a
mailbox for invoking interrupts on remote processors in the system.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

This patch adds device tree bindings document for the FlexRM
ring manager found on Broadcom iProc SoCs.
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Update the DT bindings documentation to reflect the new NSP version
of PDC driver compatibility string.
Signed-off-by: NSteve Lin <steven.lin1@broadcom.com>
Acked-by: NJon Mason <jon.mason@broadcom.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Add DT binding for the Hardware Synchronization Primitives (HSP). The
HSP is designed for the processors to share resources and communicate
with one another. A set of hardware synchronization primitives for
interprocessor communication (IPC) is provided. IPC protocols can use
use these hardware synchronization primitives when operating between
processors in an AMP configuration.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The address of the mailbox node in the example has a typo.
So fix it accordingly.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Fixes: d4b5c782 ("dt/bindings: Add binding for the BCM2835 mailbox driver")
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NEric Anholt <eric@anholt.net>

Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Add the device tree binding documentation for the PDC hardware
in Broadcom iProc SoCs.
Signed-off-by: NRob Rice <rob.rice@broadcom.com>
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NAnup Patel <anup.patel@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Message Manager is a hardware block used to communicate with various
processor systems within certain Texas Instrument's Keystone
generation SoCs.

This hardware engine is used to transfer messages from various compute
entities(or processors) within the SoC. It is designed to be self
contained without needing software initialization for operation.
Signed-off-by: NNishanth Menon <nm@ti.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

This add the necessary binding documentation for mailbox
found on RK3368 SoC.
Signed-off-by: NCaesar Wang <wxt@rock-chips.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Document DT binding for Hisilicon Hi6220 mailbox driver.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLeo Yan <leo.yan@linaro.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Underscores are usually forbidden in the compatible strings. So lets
remove it before the first users of this is seen.
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

This adds the APM X-Gene SLIMpro mailbox device tree
node documentation.
Signed-off-by: NFeng Kan <fkan@apm.com>
Signed-off-by: NDuc Dang <dhdang@apm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

The mailbox framework controls the transmission queue and requires
either its controller implementations or clients to run the state
machine for the Tx queue. The OMAP mailbox controller uses a Tx-ready
interrupt as the equivalent of a Tx-done interrupt to run this Tx
queue state-machine.

The WkupM3 processor on AM33xx and AM43xx SoCs is used to offload
certain PM tasks, like doing the necessary operations for Device
PM suspend/resume or for entering lower c-states during cpuidle.

The CPUIdle on AM33xx requires the messages to be sent without
having to trigger the Tx-ready interrupts, as the interrupt
would immediately terminate the CPUIdle operation. Support for
this has been added by introducing a DT quirk, "ti,mbox-send-noirq"
and using it to modify the normal OMAP mailbox controller behavior
on the sub-mailboxes used to communicate with the WkupM3 remote
processor. This also requires the wkup_m3_ipc driver to adjust
its mailbox usage logic to run the Tx state machine.

NOTE:
- AM43xx does not communicate with WkupM3 for CPU Idle, so is
  not affected by this behavior. But, it uses the same IPC driver
  for PM suspend/resume functionality, so requires the quirk as
  well, because of changes to the common wkup_m3_ipc driver.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise logic and update comments/patch description]
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

A new API call has been introduced which allows channels to be
requested by name.  This new call uses the 'mbox-names' property,
so users need no further discouragement from supplying it.
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

This patch was split out of Lubomir's original mailbox patch by Eric
Anholt, and the required properties documentation and examples have
been filled out more completely and updated for the driver being
changed to expose a single channel.
Signed-off-by: NLubomir Rintel <lkundrak@v3.sk>
Signed-off-by: NCraig McGeachie <slapdau@yahoo.com.au>
Signed-off-by: NEric Anholt <eric@anholt.net>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Add driver for the ARM Primecell Message-Handling-Unit(MHU) controller.
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: NAndy Green <andy.green@linaro.org>
Signed-off-by: NVincent Yang <vincent.yang@socionext.com>
Signed-off-by: NTetsuya Nuriya <nuriya.tetsuya@socionext.com>

The Altera mailbox allows for interprocessor communication. It supports
only one channel and work as either sender or receiver.
Signed-off-by: NLey Foon Tan <lftan@altera.com>

The OMAP mailbox driver and its existing clients (remoteproc
for OMAP4+) are adapted to use the generic mailbox framework.

The main changes for the adaptation are:
  - The tasklet used for Tx is replaced with the state machine from
    the generic mailbox framework. The workqueue used for processing
    the received messages stays intact for minimizing the effects on
    the OMAP mailbox clients.
  - The existing exported client API, omap_mbox_get, omap_mbox_put and
    omap_mbox_send_msg are deleted, as the framework provides equivalent
    functionality. A OMAP-specific omap_mbox_request_channel is added
    though to support non-DT way of requesting mailboxes.
  - The OMAP mailbox driver is integrated with the mailbox framework
    through the proper implementations of mbox_chan_ops, except for
    .last_tx_done and .peek_data. The OMAP mailbox driver does not need
    these ops, as it is completely interrupt driven.
  - The OMAP mailbox driver uses a custom of_xlate controller ops that
    allows phandles for the pargs specifier instead of indexing to avoid
    any channel registration order dependencies.
  - The new framework does not support multiple clients operating on a
    single channel, so the reference counting logic is simplified.
  - The remoteproc driver (current client) is adapted to use the new API.
    The notifier callbacks used within this client is replaced with the
    regular callbacks from the newer framework.
  - The exported OMAP mailbox API are limited to omap_mbox_save_ctx,
    omap_mbox_restore_ctx, omap_mbox_enable_irq & omap_mbox_disable_irq,
    with the signature modified to take in the new mbox_chan handle instead
    of the OMAP specific omap_mbox handle. The first 2 will be removed when
    the OMAP mailbox driver is adapted to runtime_pm. The other exported
    API omap_mbox_request_channel will be removed once existing legacy
    users are converted to DT.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Define generic bindings for the framework clients to
request mailbox channels.
Reviewed-by: NMark Brown <broonie@linaro.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Add the device tree bindings document for OMAP2+ mailbox.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>