1. 24 9月, 2012 1 次提交
    • T
      OMAPDSS: DSI: improve DSI clock calcs for DISPC · d66b1581
      Tomi Valkeinen 提交于
      Commit ee144e64 added
      dsi_pll_calc_ddrfreq() which calculates PLL dividers based on given DSI
      bus clock speed. The function works ok, but it can be improved for the
      DISPC clock calc.
      
      The current version calculates the clock going from the PLL to the DISPC
      simply by setting the clock as close to DISPC maximum as possible, and
      the pixel clock is calculated based on that.
      
      This patch changes the function to calculate DISPC clock more
      dynamically, iterating through different DISPC clocks and pixel clock
      values, and thus we'll get more suitable pixel clocks.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      d66b1581
  2. 08 9月, 2012 3 次提交
    • T
      OMAPDSS: remove unnecessary includes · fe6a4662
      Tomi Valkeinen 提交于
      Remove unnecessary includes from omapdss.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      fe6a4662
    • T
      OMAPDSS: fix use of dssdev->caps · ab585254
      Tomi Valkeinen 提交于
      Recent commit dca2b152 (OMAPDSS: DSI:
      Maintain copy of operation mode in driver data) broke DSI for video mode
      displays. The commit changed the way dssdev->caps are initialized, and
      the result was that every DSI display is initialized with manual-update
      and tear-elim caps.
      
      The code that sets dssdev->caps is not very good, even when fixed.
      omapdss driver shouldn't be writing dssdev->caps at all.
      
      This patch fixes the problem with video mode displays by moving the
      initialization of dssdev->caps to the panel driver. The same change is
      done for RFBI.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      ab585254
    • T
      OMAPDSS: DSI: calculate dsi clock · ee144e64
      Tomi Valkeinen 提交于
      Currently the way to configure clocks related to DSI (both DSI and DISPC
      clocks) happens via omapdss platform data. The reason for this is that
      configuring the DSS clocks is a very complex problem, and it's
      impossible for the SW to know requirements about things like
      interference.
      
      However, for general cases it should be fine to calculate the dividers
      for clocks in the SW. The calculated clocks are probably not perfect,
      but should work.
      
      This patch adds support to calculate the dividers when using DSI command
      mode panels. The panel gives the required DDR clock rate and LP clock
      rate, and the DSI driver configures itself and DISPC accordingly.
      
      This patch is somewhat ugly, though. The code does its job by modifying
      the platform data where the clock dividers would be if the board file
      gave them. This is not how it's going to be in the future, but allows us
      to have quite simple patch and keep the backward compatibility.
      
      It also allows the developer to still give the exact dividers from the
      board file when there's need for that, as long as the panel driver does
      not override them.
      
      There are also other areas for improvement. For example, it would be
      better if the panel driver could ask for a DSI clock in a certain range,
      as, at least command mode panels, the panel can work fine with many
      different clock speeds.
      
      While the patch is not perfect, it allows us to remove the hardcoded
      clock dividers from the board file, making it easier to bring up a new
      panel and to use device tree from omapdss.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      ee144e64
  3. 16 8月, 2012 4 次提交
    • A
      OMAPDSS: DSI: Maintain copy of video mode timings in driver data · 0b3ffe39
      Archit Taneja 提交于
      The DSI driver currently relies on the omap_dss_device struct to receive the
      video mode timings requested by the panel driver. This makes the DSI interface
      driver dependent on the omap_dss_device struct.
      
      Make the DSI driver data maintain it's own video mode timings field. The panel
      driver is expected to call omapdss_dsi_set_videomode_timings() to configure the
      video mode timings before the interface is enabled.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      0b3ffe39
    • A
      OMAPDSS: DSI: Rename dsi_videomode_data to dsi_videomode_timings · 6b849375
      Archit Taneja 提交于
      The struct omap_dss_dsi_videomode_data holds fields which need to be configured
      for DSI to operate in video mode. Rename the struct to dsi_videomode_timings.
      
      One reason to do this is because most of the fields in the struct are timings
      related. The other reason is to create a generic op for output specific
      timings. This generic op can be considered as a way to set custom or private
      timings for the output.
      
      In the case of OMAP, DSI and RFBI require some more timings apart from the
      relgular DISPC timings. The structs omap_dss_videomode_timings and rfbi_timings
      can be considered as these output specific timings respectively.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      6b849375
    • A
      OMAPDSS: DSI: Maintain copy of operation mode in driver data · dca2b152
      Archit Taneja 提交于
      The DSI driver currently relies on the omap_dss_device struct to know the mode
      of operation of the DSI protocol(command or video mode). This makes the DSI
      interface driver dependent on the omap_dss_device struct.
      
      Make the DSI driver data maintain it's own operation mode field. The panel
      driver is expected to call omapdss_dsi_set_operation_mode() before the interface
      is enabled.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      dca2b152
    • A
      OMAPDSS: DSI: Maintain copy of pixel format in driver data · 02c3960b
      Archit Taneja 提交于
      The DSI driver currently relies on the omap_dss_device struct to receive the
      desired pixel format of the panel. This makes the DSI interface driver dependent
      on the omap_dss_device struct.
      
      Make the DSI driver data maintain it's own pixel format field. The panel driver
      is expected to call omapdss_dsi_set_pixel_format() to configure the pixel format
      before the interface is enabled.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      02c3960b
  4. 13 8月, 2012 3 次提交
    • A
      OMAPDSS: DSI: Update manager timings on a manual update · 55cd63ac
      Archit Taneja 提交于
      During a command mode update using DISPC video port, we may need to swap the
      connected overlay manager's width and height when 90 or 270 degree rotation is
      done via the panel by changing it's address mode.
      
      Call dss_mgr_set_timings() in update_screen_dispc() before starting the manager
      update. The new manager size is updated in the 'timings' field of DSI driver's
      private data via omapdss_dsi_set_size(). A panel driver is expected to call this
      when performing rotation.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      55cd63ac
    • A
      OMAPDSS: DSI: Add function to set panel size for command mode panels · e352574d
      Archit Taneja 提交于
      DSI command mode panels don't need to configure a full set of timings to
      configure DSI, they only require the width and the height of the panel in
      pixels.
      
      Use omapdss_dsi_set_size for command mode panels, omapdss_dsi_set_timings is
      meant for video mode panels. When performing rotation via chaning the address
      mode of the panel, we would need to swap width and height when doing 90 or 270
      rotation. Make sure that omapdss_dsi_set_size() makes the new width and height
      visible to DSI.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      e352574d
    • A
      OMAPDSS: DSI: Maintain own copy of timings in driver data · e67458a8
      Archit Taneja 提交于
      The DSI driver currently relies on the timings in omap_dss_device struct to
      configure the DISPC and DSI blocks accordingly. This makes the DSI interface
      driver dependent on the omap_dss_device struct.
      
      Make the DSI driver data maintain it's own timings field. A DSI video mode panel
      driver is expected to call omapdss_dsi_set_timings() to set these timings before
      the panel is enabled.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      e67458a8
  5. 08 7月, 2012 1 次提交
    • T
      OMAPDSS: fix warnings if CONFIG_PM_RUNTIME=n · 373b4365
      Tomi Valkeinen 提交于
      If runtime PM is not enabled in the kernel config, pm_runtime_get_sync()
      will always return 1 and pm_runtime_put_sync() will always return
      -ENOSYS. pm_runtime_get_sync() returning 1 presents no problem to the
      driver, but -ENOSYS from pm_runtime_put_sync() causes the driver to
      print a warning.
      
      One option would be to ignore errors returned by pm_runtime_put_sync()
      totally, as they only say that the call was unable to put the hardware
      into suspend mode.
      
      However, I chose to ignore the returned -ENOSYS explicitly, and print a
      warning for other errors, as I think we should get notified if the HW
      failed to go to suspend properly.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Jassi Brar <jaswinder.singh@linaro.org>
      Cc: Grazvydas Ignotas <notasas@gmail.com>
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
      373b4365
  6. 29 6月, 2012 9 次提交
    • A
      OMAPDSS: APPLY: Remove DISPC writes to manager's lcd parameters in interface drivers · f476ae9d
      Archit Taneja 提交于
      Replace the DISPC fuctions used to configure LCD channel related manager
      parameters with dss_mgr_set_lcd_config() in APPLY. This function ensures that
      the DISPC registers are written at the right time by using the shadow register
      programming model.
      
      The LCD manager configurations is stored as a private data of manager in APPLY.
      It is treated as an extra info as it's the panel drivers which trigger this
      apply via interface drivers, and not a DSS2 user like omapfb or omapdrm.
      
      Storing LCD manager related properties in APPLY also prevents the need to refer
      to the panel connected to the manager for information. This helps in making the
      DSS driver less dependent on panel.
      
      A helper function is added to check whether the manager is LCD or TV. The direct
      DISPC register writes are removed from the interface drivers.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      f476ae9d
    • A
      OMAPDSS: DSI: Configure dss_lcd_mgr_config struct with lcd manager parameters · 7d2572f8
      Archit Taneja 提交于
      Create a dss_lcd_mgr_config struct instance in DSI. Fill up all the parameters
      of the struct with configurations held by the panel, and the configurations
      required by DSI.
      
      Use these to write to the DISPC registers. These direct register writes would be
      later replaced by a function which applies the configuration using the shadow
      register programming model.
      
      The function dsi_configure_dispc_clocks() is now called in
      dsi_display_init_dispc(), this lets all the lcd manager related configurations
      happen in the same place. The DISPC_DIVISORo register was written in
      dsi_configure_dispc_clock(), now it just fills up the dispc_clock_info parameter
      in mgr_config. The clock_info is written later in dsi_display_init_dispc().
      Signed-off-by: NArchit Taneja <archit@ti.com>
      7d2572f8
    • A
      OMAPDSS: DISPC: Change return type of dispc_mgr_set_clock_div() · f0d08f89
      Archit Taneja 提交于
      dipsc_mgr_set_clock div has an int return type to report errors or success.
      The function doesn't really check for errors and always returns 0. Change
      the return type to void.
      
      Checking for the correct DISPC clock divider ranges will be done when a DSS2
      user does a manager apply. This support will be added later.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      f0d08f89
    • A
      OMAPDSS: DSI: Fix HSYNC, VSYNC and DE polarities between DISPC and DSI · bd5a7b11
      Archit Taneja 提交于
      For DSI operation in videomode, DISPC logic levels for the signals HSYNC, VSYNC
      and DE need to be specified to DSI via the fields VP_HSYNC_POL, VP_VSYNC_POL and
      VP_DE_POL in DSI_CTRL registers.
      
      This information is completely internal to DSS as logic levels for the above
      signals hold no meaning on the DSI bus. Hence a DSI panel driver should be
      totally oblivious of these fields.
      
      Fix the logic levels/polarities in the DISPC and DSI registers to a default
      value. This is done by overriding these fields in omap_video_timings struct
      filled by the panel driver for DISPC, and use the equivalent default values
      when programming DSI_CTRL registers. Also, remove the redundant polarity related
      fields in omap_dss_dsi_videomode_data.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      bd5a7b11
    • A
      OMAPDSS: Remove passive matrix LCD support (part 3) · d21f43bc
      Archit Taneja 提交于
      Remove omap_lcd_display_type enum
      
      The enum omap_lcd_display_type is used to configure the lcd display type in
      DISPC. Remove this enum and always set display type to TFT by creating function
      dss_mgr_set_lcd_type_tft().
      Signed-off-by: NArchit Taneja <archit@ti.com>
      d21f43bc
    • A
      OMAPDSS: Remove passive matrix LCD support (part 1) · 6d523e7b
      Archit Taneja 提交于
      Remove clock constraints related to passive matrix displays.
      
      There is a constraint (pcd_min should be 3) for passive matrix displays. Remove
      this constraint in clock divider calculations as we won't support passive
      matrix displays any more.
      
      This cleans up the functions which calculate the clock dividers with DSI's PLL
      or DSS_FCLK as the clock source.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      6d523e7b
    • C
      OMAPDSS: Cleanup implementation of LCD channels · efa70b3b
      Chandrabhanu Mahapatra 提交于
      The current implementation of LCD channels and managers consists of a number of
      if-else construct which has been replaced by a simpler interface. A constant
      structure mgr_desc has been created in Display Controller (DISPC) module. The
      mgr_desc contains for each channel its name, irqs and  is initialized one time
      with all registers and their corresponding fields to be written to enable
      various features of Display Subsystem. This structure is later used by various
      functions of DISPC which simplifies the further implementation of LCD channels
      and its corresponding managers.
      Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      efa70b3b
    • T
      OMAPDSS: fix warnings if CONFIG_PM_RUNTIME=n · 5be3aebd
      Tomi Valkeinen 提交于
      If runtime PM is not enabled in the kernel config, pm_runtime_get_sync()
      will always return 1 and pm_runtime_put_sync() will always return
      -ENOSYS. pm_runtime_get_sync() returning 1 presents no problem to the
      driver, but -ENOSYS from pm_runtime_put_sync() causes the driver to
      print a warning.
      
      One option would be to ignore errors returned by pm_runtime_put_sync()
      totally, as they only say that the call was unable to put the hardware
      into suspend mode.
      
      However, I chose to ignore the returned -ENOSYS explicitly, and print a
      warning for other errors, as I think we should get notified if the HW
      failed to go to suspend properly.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Jassi Brar <jaswinder.singh@linaro.org>
      Cc: Grazvydas Ignotas <notasas@gmail.com>
      5be3aebd
    • R
      OMAPDSS: add clk_prepare_enable and clk_disable_unprepare · f11766d1
      Rajendra Nayak 提交于
      In preparation of OMAP moving to Common Clk Framework(CCF) change
      clk_enable() and clk_disable() calls to clk_prepare_enable() and
      clk_disable_unprepare() in omapdss. This can be safely done, as omapdss
      never enables or disables clocks in atomic context.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: <linux-fbdev@vger.kernel.org>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Mike Turquette <mturquette@linaro.org>
      [tomi.valkeinen@ti.com: updated patch description]
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      f11766d1
  7. 04 6月, 2012 1 次提交
  8. 22 5月, 2012 1 次提交
    • T
      OMAPDSS: remove compiler warnings when CONFIG_BUG=n · c6eee968
      Tomi Valkeinen 提交于
      If CONFIG_BUG is not enabled, BUG() does not stop the execution. Many
      places in code expect the execution to stop, and this causes compiler
      warnings about uninitialized variables and returning from a non-void
      function without a return value.
      
      This patch fixes the warnings by initializing the variables and
      returning properly after BUG() lines. However, the behaviour is still
      undefined after the BUG, but this is the choice the user makes when
      using CONFIG_BUG=n.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      c6eee968
  9. 21 5月, 2012 1 次提交
    • A
      OMAPDSS: DSI: Support command mode interleaving during video mode blanking periods · 6f28c296
      Archit Taneja 提交于
      DSI supports interleaving of command mode packets during the HSA, HFP, HBP and
      BLLP blanking intervals in a video mode stream. This is useful as a user may
      want to read or change the configuration of a panel without stopping the video
      stream.
      
      On OMAP DSI, we can queue HS or LP command mode packets in the TX FIFO, and
      the DSI HW takes care of interleaving this data during the one of the blanking
      intervals. The DSI HW needs to be programmed with the maximum amount of data
      that can be interleaved in a particular blanking period. A blanking period
      cannot be used to send command mode data for it's complete duration, there is
      some amount of time required for the DSI data and clock lanes to transition
      to the desired LP or HS state.
      
      Based on the state of the lanes at the beginning and end of the blanking period,
      we have different scenarios, with each scenario having a different value of time
      required to transition to HS or LP. Refer to the section 'Interleaving Mode' in
      OMAP TRM for more info on the scenarios and the equations to calculate the time
      required for HS or LP transitions.
      
      We use the scenarios which takes the maximum time for HS or LP transition, this
      gives us the minimum amount of time that can be used to interleave command mode
      data. The amount of data that can be sent during this minimum time is calculated
      for command mode packets both in LP and HS. These are written to the registers
      DSI_VM_TIMING4 to DSI_VM_TIMING6.
      
      The calculations don't take into account the time required of transmitting BTA
      when doing a DSI read, or verifying if a DSI write went through correctly. Until
      these latencies aren't considered, the behaviour of DSI is unpredictable when
      a BTA is interleaved during a blanking period. Enhancement of these calculations
      is a TODO item.
      
      The calculations are derived from DSI parameter calculation tools written by
      Sebastien Fagard <s-fagard@ti.com>
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      6f28c296
  10. 11 5月, 2012 11 次提交
  11. 09 5月, 2012 3 次提交
    • A
      OMAPDSS: Apply manager timings instead of direct DISPC writes · 41721163
      Archit Taneja 提交于
      Replace the function dispc_mgr_set_timings() with dss_mgr_set_timings() in the
      interface drivers. The latter function ensures that the timing related DISPC
      registers are configured according to the shadow register programming model.
      
      Remove the call to dispc_mgr_go() in dpi_set_timings() as the manager's go bit
      is set by dss_mgr_set_timings().
      Signed-off-by: NArchit Taneja <archit@ti.com>
      41721163
    • A
      OMAPDSS: DISPC: Remove Fake VSYNC support · 408d9dbb
      Archit Taneja 提交于
      Fake VSYNC support is a hack and has some bugs in it. It isn't used by any user
      of DSS. Remove Fake VSYNC support. For DSI command mode and RFBI panels, a user
      of DSS should wait for the completion of a frame by using the panel driver's
      sync op.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      408d9dbb
    • T
      OMAPDSS: DSI: implement generic DSI pin config · e4a9e94c
      Tomi Valkeinen 提交于
      In preparation for device tree, this patch changes how the DSI pins are
      configured. The current configuration method is only doable with board
      files and the configuration data is OMAP specific.
      
      This patch moves the configuration data to the panel's platform data,
      and the data can easily be given via DT in the future. The configuration
      data format is also changed to a generic one which should be suitable
      for all platforms.
      
      The new format is an array of pin numbers, where the array items start
      from clock + and -, then data1 + and -, and so on. For example:
      
      {
      	0,	// pin num for clock lane +
      	1,	// pin num for clock lane -
      	2,	// pin num for data1 lane +
      	3,	// pin num for data1 lane -
      	...
      }
      
      The pin numbers are translated by the DSI driver and used to configure
      the hardware appropriately.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Acked-by: NTony Lindgren <tony@atomide.com>
      e4a9e94c
  12. 23 4月, 2012 2 次提交
    • A
      OMAPDSS: DISPC: Use a common function to set manager timings · c51d921a
      Archit Taneja 提交于
      Currently, a LCD manager's timings is set by dispc_mgr_set_lcd_timings() and TV
      manager's timings is set by dispc_set_digit_size(). Use a common function called
      dispc_mgr_set_timings() which sets timings for both type of managers.
      
      We finally want the interface drivers to use an overlay manager function to
      configure it's timings, having a common DISPC function would make things
      cleaner.
      
      For LCD managers, dispc_mgr_set_timings() sets LCD size and blanking values, for
      TV manager, it sets only the TV size since blanking values don't exist for TV.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      c51d921a
    • T
      OMAPDSS: DSI: remove option to use pck for DSI PLL clkin · b6e695ab
      Tomi Valkeinen 提交于
      For some OMAP versions the TRM says that the pixel clock from DISPC can
      be used as an input clock for DSI PLL, instead of the default, which is
      sysclk.  For some OMAP versions the bits affecting this are marked as
      reserved.  This feature has never been tested, so it's unknown if the HW
      even works, and has never been used.
      
      To clean things up, this patch removes the functionality. This should
      not affect any board.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      b6e695ab