1. 25 9月, 2010 1 次提交
    • R
      OMAP4: PM: Declare idle modules as functional too · ff173d45
      Rajendra Nayak 提交于
      The omap4_cm_wait_module_ready function would only check for
      the modules to be completely functional before declaring them
      ready to be accessed.
      There might also be instances where in the module is actually
      in idle (under h/w control) but should still be declared
      accessible, as the h/w control would make it functional when
      needed.
      
      Hence make omap4_cm_wait_module_ready return true in case
      the module is fully functional *or* in idle state.
      Fail only if the module is fully disabled or stuck intransition.
      
      The explaination from the TRM for the idlest bits on OMAP4 is as
      below for quick reference
      
      Module idle state:
      0x0 func:     Module is fully functional, including OCP
      0x1 trans:    Module is performing transition: wakeup, or sleep, or sleep
                    abortion
      0x2 idle:     Module is in Idle mode (only OCP part). It is functional if
                    using separate functional clock
      0x3 disabled: Module is disabled and cannot be accessed
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NPartha Basak <p-basak2@ti.com>
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      ff173d45
  2. 21 5月, 2010 2 次提交
    • B
      OMAP4: hwmod & CM: Implement the omap4_cm_wait_module_ready function · 9a23dfe1
      Benoit Cousson 提交于
      The return of the omap4_cm_wait_module_ready function is checked
      in order to avoid accessing the sysconfig register if the module is
      not in the correct state.
      In that case the _setup will exit without trying to reset
      using sysconfig.
      For the moment a warning is printed. A proper management of fclk
      and module reset will have to be done in order to init correctly
      the problematic IPs listed below.
      
        <4>omap_hwmod: ivahd: cannot be enabled (3)
        <4>omap_hwmod: iss: cannot be enabled (3)
        <4>omap_hwmod: tesla: cannot be enabled (3)
        <4>omap_hwmod: sdma: cannot be enabled (3)
        <4>omap_hwmod: sl2: cannot be enabled (3)
        <4>omap_hwmod: sad2d: cannot be enabled (3)
        <4>omap_hwmod: ducati: cannot be enabled (3)
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      9a23dfe1
    • B
      OMAP: CM: Move MAX_MODULE_READY_TIME to cm.h · d9e6625c
      Benoit Cousson 提交于
      The maximum timeout to wait for the PRCM to request that a module
      exit idle or reach functionnal state is common to OMAP2/3/4 SoCs,
      so, move it to the chip family-common cm.h include file.
      
      Reduce the timeout from 20 ms to 2 ms.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      d9e6625c
  3. 25 9月, 2009 1 次提交
  4. 04 9月, 2009 1 次提交
    • P
      OMAP2/3/4 PRCM: add module IDLEST wait code · 71348bca
      Paul Walmsley 提交于
      After a hardware module's clocks are enabled, Linux must wait for it
      to indicate readiness via its IDLEST bit before attempting to access
      the device, otherwise register accesses to the device may trigger an
      abort.  This has traditionally been implemented in the clock
      framework, but this is the wrong place for it: the clock framework
      doesn't know which module clocks must be enabled for a module to leave
      idle; and if a module is not in smart-idle mode, it may never leave
      idle at all.  This type of information is best stored in a
      per-hardware module data structure (coming in a following patch),
      rather than a per-clock data structure.  The new code will use these new
      functions to handle waiting for modules to enable.
      
      Once hardware module data is filled in for all of the on-chip devices,
      the clock framework code to handle IDLEST waiting can be removed.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      71348bca