1. 06 5月, 2012 3 次提交
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      drm/i915: allow the existing error_state to be destroyed · d5442303
      Daniel Vetter 提交于
      ... by writing (anything) to i915_error_state.
      
      This way we can simulate a bunch of gpu hangs and run the error_state
      capture code every time (without the need to reload the module).
      
      To make that happen we need to abandon the simple seq_file wrappers
      provided by the drm core. While at it put the new error_state
      refcounting to some good use and associated the error_state to the
      debugfs when opening the file. Otherwise the error_state could change
      while someone is reading it. This should help greatly when we finally
      get around to split up the giant single seq_file block that the
      error_state file currently is into smaller parts.
      
      v2: Actually squash all the fixes into the patch ...
      Reviewed-by: NEugeni Dodonov <eugeni.dodonov@intel.com>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      d5442303
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      drm/i915: rework dev->first_error locking · 742cbee8
      Daniel Vetter 提交于
      - reduce the irq disabled section, even for a debugfs file this was
        way too long.
      - always disable irqs when taking the lock.
      
      v2: Thou shalt not mistake locking for reference counting, so:
      - reference count the error_state to protect from concurent freeeing.
        This will be only really used in the next patch.
      Reviewed-by: NEugeni Dodonov <eugeni.dodonov@intel.com>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      742cbee8
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      drm/i915: add interface to simulate gpu hangs · e5eb3d63
      Daniel Vetter 提交于
      gpu reset is a very important piece of our infrastructure.
      Unfortunately we only really it test by actually hanging the gpu,
      which often has bad side-effects for the entire system. And the gpu
      hang handling code is one of the rather complicated pieces of code we
      have, consisting of
      - hang detection
      - error capture
      - actual gpu reset
      - reset of all the gem bookkeeping
      - reinitialition of the entire gpu
      
      This patch adds a debugfs to selectively stopping rings by ceasing to
      update the hw tail pointer, which will result in the gpu no longer
      updating it's head pointer and eventually to the hangcheck firing.
      This way we can exercise the gpu hang code under controlled conditions
      without a dying gpu taking down the entire systems.
      
      Patch motivated by me forgetting to properly reinitialize ppgtt after
      a gpu reset.
      
      Usage:
      
      echo $((1 << $ringnum)) > i915_ring_stop # stops one ring
      
      echo 0xffffffff > i915_ring_stop # stops all, future-proof version
      
      then run whatever testload is desired. i915_ring_stop automatically
      resets after a gpu hang is detected to avoid hanging the gpu to fast
      and declaring it wedged.
      
      v2: Incorporate feedback from Chris Wilson.
      
      v3: Add the missing cleanup.
      
      v4: Fix up inconsistent size of ring_stop_read vs _write, noticed by
      Eugeni Dodonov.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NEugeni Dodonov <eugeni.dodonov@intel.com>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      e5eb3d63
  2. 04 5月, 2012 2 次提交
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      drm/i915: use mode values consistently when converting to sdvo dtd · c6ebd4c0
      Daniel Vetter 提交于
      The drm_mode->dtd conversion used the crtc timings, whereas the
      dtd->drm_mod did not set these. Use the standard mode information, not
      the crtc timings, in both cases to make these two functions proper
      inverses of each another.
      
      Note that this also kills the risk that we handle interlaced timings
      inconsistently because the drm core uses half-frames for crtc timings,
      whereas we need full frames. But interlaced support is pretty decently
      broken anyway for sdvo encoders, so no big deal.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c6ebd4c0
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      drm/i915: rip out unnecessary calls to drm_mode_set_crtcinfo · f7bacf19
      Daniel Vetter 提交于
      Our handling of the crtc timing computation has been nicely
      cargo-culted with calls to drm_mode_set_crtcinfo sprinkled all over
      the place. But with
      
      commit f9bef081
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sun Apr 15 19:53:19 2012 +0200
      
          drm/i915: don't clobber the special upscaling lvds timings
      
      and
      
      commit ca9bfa7e
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sat Jan 28 14:49:20 2012 +0100
      
          drm/i915: fixup interlaced vertical timings confusion, part 1
      
      we now only set the crtc timing fields in the encoder->mode_fixup
      (lvds only) and in crtc->mode_fixup (for everyone else). And since
      
      commit 75c13993
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sat Jan 28 23:48:46 2012 +0100
      
          drm/i915: fixup overlay checks for interlaced modes
      
      the only places we actually need the crtc timings is in the mode_set
      function.
      
      I guess the idea of the drm core is that every time it creates a drm
      mode, it also sets the timings. But afaics it never uses them, safe
      for the precise vblank timestamp code (but that can only run on active
      modes, i.e.  after our mode_fixup functions have been called). The
      problem is that drm core always sets CRTC_INTERLACE_HALVE_V, so the
      timings are pretty much bogus for us anyway (at least with interlaced
      support).
      
      So I guess it's the drivers job that every active modes needs to have
      crtc timings that suits it, and with these patches we should have
      that. drm core doesn't seem to care about modes that just get passed
      around. Hence we can now safely rip out all the remaining calls to
      set_crtcinfo left in the driver and clean up this confusion.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      f7bacf19
  3. 03 5月, 2012 35 次提交