Adding the AHB and APB bus clock for Tegra30.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.

Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../iomap.h" becaue of this change. uncompress.h will soon
be deleted in later multi-platform/single-zImage patches. debug-macro.S
will need to continue to include this header using an explicit relative
path, to avoid duplicating the physical->virtual address mapping that
iomap.h dictates.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Change the type of variable from "unsigned long" to "u64".
This avoids the overflow while clock rate calculating.
Signed-off-by: NMark Zhang <markz@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The tegra_cpu_car_ops provide the interface for CPU to control
it's clock gating and reset status. The other drivers should use
this for CPU control. And should not directly access CAR registers
to control CPU.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Warnings were generated because following commit changed data type for
address pointer

195bbcac ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors

arch/arm/mach-tegra/tegra30_clocks.c: In function 'clk_measure_input_freq':
arch/arm/mach-tegra/tegra30_clocks.c:418:2: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast
.../arch/arm/include/asm/io.h:88:20: note: expected 'volatile void *' but argument is of type 'unsigned int
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Currently the tegra20 and tegra30 share the same symbol for
tegra_clk_32k_ops. This will cause a compile error when building
a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and
modify tegra30_clk_32k_ops for tegra30.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This patch converts tegra clock code to generic clock framework in following way:
 - Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c)
 - Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk.
 - Initialize all clock data statically. (tegraXX_clocks_data.c)

Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions.
Removed init function. It's functionality is splitted into recalc_rate and is_enabled.

Static initialization is used since slab is not up in .init_early and clock
is needed to be initialized before clockevent/clocksource initialization.
Macros redefined for clk_tegra.

Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This
is to move quickly to generic common clock framework so that other dependent features will
not be blocked (such as DT binding).

Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20
and Tegra30.
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Move clock initialization data to separate file. This is
required for migrating to generic clock framework if static
initialization is used.
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

A subsequent patch will add a generic PWM API driver for the Tegra PWFM
controller, supporting all four PWM devices with a single PWM chip. The
device will be named tegra-pwm and only one clock needs to be provided.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Rename the driver name of the clock entry of Tegra APBDMA to
tegra-apbdma from of tegra-dma.

This name is more aligned towards the movement of dmaengine based
new DMA driver.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

In Tegra30 clock file two clk objects were created for same UART clock.
Remove the duplicates and add clock aliases instead.

Update the Tegra20 clock file to make the names consistent.
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all
devices on the AHUB's configlink bus. The AHUB driver must be able to
call clk_get_sys() to retrieve the clock parameter for this function.
Add the necessary clock aliases to allow this.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>

Add basic tegra30 clock framework. Not all clocks are supported yet. Mainly
clocks requiring voltage scaling are not yet implemented in this version.

Based on work by Alex Frid <afrid@nvidia.com> and
Scott Williams <scwilliams@nvidia.com>.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>