- 21 5月, 2018 1 次提交
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由 Fabio Estevam 提交于
Currently the 'big-endian' property is listed as required, which is not correct. i.MX SoCs do not need such property, so move it under 'Optional properties' entry instead. Also, fsl-sai.txt incorrectly referenced 'FTM_PWM registers', so change it to 'SAI registers', which is the intended description. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 10 11月, 2017 1 次提交
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由 Marco Franchi 提交于
Improve the binding example by removing all the leading zeros to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading 0s Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"` Some unnecessary changes were manually fixed. Signed-off-by: NMarco Franchi <marco.franchi@nxp.com> Signed-off-by: NRob Herring <robh@kernel.org>
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- 05 9月, 2017 1 次提交
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由 Rob Herring 提交于
Pretty much any node can have a status property, so it doesn't need to be in examples. Converted with the following command and removed examples with SoC and board specific splits: git grep -l -E 'status.*=.*' Documentation/devicetree/ | xargs sed -i -E '/\sstatus.*=.*"(disabled|ok|okay)/d' Acked-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NRob Herring <robh@kernel.org>
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- 25 11月, 2015 1 次提交
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由 Shengjiu Wang 提交于
ASRC need to enable the spba clock, when sdma is using share peripheral script. In this case, there is two spba master port is used, if don't enable the clock, the spba bus will have arbitration issue, which may cause read/write wrong data from/to ASRC registers Signed-off-by: NShengjiu Wang <shengjiu.wang@freescale.com> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 30 7月, 2014 1 次提交
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由 Nicolin Chen 提交于
The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a signal associated with an input clock into a signal associated with a different output clock. The driver currently works as a Front End of DPCM with other Back Ends DAI links such as ESAI<->CS42888 and SSI<->WM8962 and SAI. It converts the original sample rate to a common rate supported by Back Ends for playback while converts the common rate of Back Ends to a desired rate for capture. It has 3 pairs to support three different substreams within totally 10 channels. Signed-off-by: NNicolin Chen <nicoleotsuka@gmail.com> Reviewed-by: NVarka Bhadram <varkabhadram@gmail.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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