1. 19 6月, 2013 1 次提交
  2. 13 6月, 2013 1 次提交
  3. 06 6月, 2013 3 次提交
  4. 29 5月, 2013 2 次提交
  5. 16 5月, 2013 1 次提交
  6. 29 4月, 2013 7 次提交
  7. 27 4月, 2013 2 次提交
    • S
      ARM: arch_timer: Silence debug preempt warnings · f31c2f1c
      Stephen Boyd 提交于
      Hot-plugging with CONFIG_DEBUG_PREEMPT=y on a device with arm
      architected timers causes a slew of "using smp_processor_id() in
      preemptible" warnings:
      
        BUG: using smp_processor_id() in preemptible [00000000] code: sh/111
        caller is arch_timer_cpu_notify+0x14/0xc8
      
      This happens because sometimes the cpu notifier,
      arch_timer_cpu_notify(), is called in preemptible context and
      other times in non-preemptible context but we use this_cpu_ptr()
      to retrieve the clockevent in all cases. We're only going to
      actually use the pointer in non-preemptible context though, so
      push the this_cpu_ptr() access down into the cases to force the
      checks to occur only in non-preemptible contexts.
      
      Cc: John Stultz <john.stultz@linaro.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Acked-by: NMarc Zyngier <Marc.Zyngier@arm.com>
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      f31c2f1c
    • L
      clocksource: nomadik-mtu: fix up clocksource/timer · ea7113f7
      Linus Walleij 提交于
      The Nomadik clocksource driver has had a bad define making it
      impossible to use it for sched_clock() for a while. Fix this
      and also enable it for the Nomadik.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      ea7113f7
  8. 21 4月, 2013 1 次提交
    • T
      clocksource: add samsung pwm timer driver · f1189989
      Tomasz Figa 提交于
      This adds a new clocksource driver for the PWM timer that is
      present in most Samsung SoCs, based on the existing driver in
      arch/arm/plat-samsung/samsung-time.c and many changes implemented by
      Tomasz Figa.
      
      Originally, the conversion of all Samsung machines to the new driver was
      planned for 3.10, but that work ended up being too late and too invasive
      just before the merge window.
      
      Unfortunately, other changes in the Exynos platform resulted in some
      Exynos4 setups, particularly the Universal C210 board to be broken. In
      order to fix that with minimum risk, so we now leave the existing pwm
      clocksource driver in place for all older platforms and use the new
      driver only for device tree enabled boards. This way, we can get the
      broken machines running again using DT descriptions.
      
      All clocksource changes were implemented by Tomasz, while the DT
      registration was rewritten by Arnd.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Tomasz Figa <t.figa@samsung.com>
      Cc: Kyungmin Park <kyungmin.park@samsung.com>
      Cc: Kukjin Kim <kgene.kim@samsung.com>
      Cc: Ben Dooks <ben-linux@fluff.org>
      Cc: John Stultz <john.stultz@linaro.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      f1189989
  9. 20 4月, 2013 2 次提交
  10. 12 4月, 2013 1 次提交
    • R
      ARM: convert arm/arm64 arch timer to use CLKSRC_OF init · 0583fe47
      Rob Herring 提交于
      This converts arm and arm64 to use CLKSRC_OF DT based initialization for
      the arch timer. A new function arch_timer_arch_init is added to allow for
      arch specific setup.
      
      This has a side effect of enabling sched_clock on omap5 and exynos5. There
      should not be any reason not to use the arch timers for sched_clock.
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Kukjin Kim <kgene.kim@samsung.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Simon Horman <horms@verge.net.au>
      Cc: Magnus Damm <magnus.damm@gmail.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: John Stultz <john.stultz@linaro.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-samsung-soc@vger.kernel.org
      Cc: linux-omap@vger.kernel.org
      Cc: linux-sh@vger.kernel.org
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      0583fe47
  11. 09 4月, 2013 3 次提交
    • M
      clocksource: sunxi: Rename sunxi to sun4i · 119fd635
      Maxime Ripard 提交于
      During the introduction of the Allwinner SoC platforms, sunxi was
      initially meant as a generic name for all the variants of the Allwinner
      SoC.
      
      It was ok at the time of the support of only the A10 and A13 that
      looks pretty much the same, but it's beginning to be troublesome with
      the future addition of the Allwinner A31 (sun6i) that is quite
      different, and would introduce some weird logic, where sunxi would
      actually mean in some case sun4i and sun5i but without sun6i...
      
      Moreover, it makes the compatible strings naming scheme not consistent
      with other architectures, where usually for this kind of compability, we
      just use the oldest SoC name that has this IP, so let's do just this.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      119fd635
    • M
      clocksource: sunxi: make use of CLKSRC_OF · ea71d9a6
      Maxime Ripard 提交于
      Using CLKSRC_OF allows to remove the SoC specific sunxi_timer.h header,
      and instead of using a custom init function in the machine definition
      use the standard clocksource_of_init function.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      ea71d9a6
    • M
      clocksource: sunxi: Cleanup the timer code · 04981731
      Maxime Ripard 提交于
      The timer code was not exact to some aspects, since most of this code
      was written wihout any datasheet. Make the needed corrections to match
      the datasheet.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      04981731
  12. 08 4月, 2013 2 次提交
  13. 04 4月, 2013 3 次提交
  14. 03 4月, 2013 1 次提交
  15. 01 4月, 2013 1 次提交
  16. 29 3月, 2013 1 次提交
    • C
      ARM: bcm281xx: Add timer driver (driver portion) · 8011657b
      Christian Daudt 提交于
      This adds support for the Broadcom timer, used in the following SoCs:
      BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
      
      Updates from V6:
      - Split DT portion into a separate patch
      
      Updates from V5:
      - Rebase to latest arm-soc/for-next
      
      Updates from V4:
      - Switch code to use CLOCKSOURCE_OF_DECLARE
      
      Updates from V3:
      - Migrate to 3.9 timer framework updates
      
      Updates from V2:
      - prepend static fns + fields with kona_
      
      Updates from V1:
      - Rename bcm_timer.c to bcm_kona_timer.c
      - Pull .h into bcm_kona_timer.c
      - Make timers static
      - Clean up comment block
      - Switched to using clockevents_config_and_register
      - Added an error to the get_timer loop if it repeats too much
      - Added to Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt
      - Added missing readl to timer_disable_and_clear
      
      Note: bcm,kona-timer was kept as the 'compatible' field to make it
      specific enough for when there are multiple bcm timers (bcm,timer is
      too generic).
      Signed-off-by: NChristian Daudt <csd@broadcom.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NJohn Stultz <john.stultz@linaro.org>
      Reviewed-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
      8011657b
  17. 28 3月, 2013 1 次提交
  18. 27 3月, 2013 1 次提交
    • E
      clk: arm: sunxi: Add a new clock driver for sunxi SOCs · e874a669
      Emilio López 提交于
      This commit implements the base CPU clocks for sunxi devices. It has
      been tested using a slightly modified cpufreq driver from the
      linux-sunxi 3.0 tree.
      
      Additionally, document the new bindings introduced by this patch.
      
      Idling:
          / # cat /sys/kernel/debug/clk/clk_summary
             clock                        enable_cnt  prepare_cnt  rate
          ---------------------------------------------------------------------
           osc32k                         0           0            32768
           osc24M_fixed                   0           0            24000000
              osc24M                      0           0            24000000
                 apb1_mux                 0           0            24000000
                    apb1                  0           0            24000000
                 pll1                     0           0            60000000
                    cpu                   0           0            60000000
                       axi                0           0            60000000
                          ahb             0           0            60000000
                             apb0         0           0            30000000
           dummy                          0           0            0
      
      After "yes >/dev/null &":
          / # cat /sys/kernel/debug/clk/clk_summary
             clock                        enable_cnt  prepare_cnt  rate
          ---------------------------------------------------------------------
           osc32k                         0           0            32768
           osc24M_fixed                   0           0            24000000
              osc24M                      0           0            24000000
                 apb1_mux                 0           0            24000000
                    apb1                  0           0            24000000
                 pll1                     0           0            1008000000
                    cpu                   0           0            1008000000
                       axi                0           0            336000000
                          ahb             0           0            168000000
                             apb0         0           0            84000000
           dummy                          0           0            0
      Signed-off-by: NEmilio López <emilio@elopez.com.ar>
      Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      e874a669
  19. 25 3月, 2013 3 次提交
  20. 20 3月, 2013 1 次提交
  21. 13 3月, 2013 2 次提交
    • S
      clocksource: sh_mtu2: Set initcall level to subsys · 342896a5
      Simon Horman 提交于
      The reason for this is to ensure that MTU2 is probed earlier
      than with its previous initcall level, module init.
      
      This came up as a problem with using CMT as a clock source kzm9g-reference
      which does not make use of early timers or devices. In that scenario
      initialisation of SDHI and MMCIF both stall on msleep() calls due to the
      absence of a initialised clock source.
      
      The purpose of this change is to keep the MTU2 code in sync with the CMT code
      which has been modified in a similar manner..
      
      Compile tested only using se7206_defconfig.
      I do not believe I have any boards that support the MTU2.
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      342896a5
    • S
      clocksource: em_sti: Set initcall level to subsys · 09acc3a1
      Simon Horman 提交于
      The reason for this is to ensure that STI is probed earlier
      than with its previous initcall level, module init.
      
      This came up as a problem with using CMT as a clock source kzm9g-reference
      which does not make use of early timers or devices. In that scenario
      initialisation of SDHI and MMCIF both stall on msleep() calls due to the
      absence of a initialised clock source.
      
      The purpose of this change is to keep the STI code in sync with the CMT code
      which has been modified in a similar manner..
      
      Boot tested on: kzm9d.
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      09acc3a1