- 25 2月, 2009 1 次提交
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由 Mark Brown 提交于
We always run in the first timeslot of one. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 1月, 2009 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 20 1月, 2009 1 次提交
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由 Mark Brown 提交于
The Zylonite supports switching the MCLK for the WM9713 between the AC97CLK and CLK_POUT outputs of the PXA processor via switch SW15 on the board. This patch adds support for configuring the system to use CLK_POUT. Unfortunately it is not possible to read the state of SW15 from software so this feature is controlled by a module option 'clk_pout' which should be set to a non-zero value to enable the use of CLK_POUT. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 03 12月, 2008 1 次提交
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由 Mark Brown 提交于
As part of the deprecation of snd_soc_device push the registration of the platform down into the card structure. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 21 11月, 2008 1 次提交
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由 Mark Brown 提交于
Implement support for the Marvell Zylonite PXA3xx reference platform, supporting standard AC97 stereo and AUX interfaces together with the auxiliary I2S interface of the WM9713. The board has two options for the MCLK of the WM9713: either the standard AC97 system clock can be used or the 13MHz CLK_POUT output of the PXA3xx can be used, selected via SW15 on the board. Currently only the AC97 system clock is supported by this driver. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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