1. 24 7月, 2016 1 次提交
    • M
      xtensa: add alternative kernel memory layouts · d39af902
      Max Filippov 提交于
      MMUv3 is able to support low memory bigger than 128MB.
      Implement 256MB and 512MB KSEG layouts:
      
      - add Kconfig selector for KSEG layout;
      - add KSEG base address, size and alignment definitions to
        arch/xtensa/include/asm/kmem_layout.h;
      - use new definitions in TLB initialization;
      - add build time memory map consistency checks.
      
      See Documentation/xtensa/mmu.txt for the details of new memory layouts.
      Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      d39af902
  2. 14 8月, 2014 2 次提交
  3. 07 4月, 2014 1 次提交
    • M
      xtensa: add HIGHMEM support · 65559100
      Max Filippov 提交于
      Introduce fixmap area just below the vmalloc region. Use it for atomic
      mapping of high memory pages.
      High memory on cores with cache aliasing is not supported and is still
      to be implemented. Fail build for such configurations for now.
      Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      65559100
  4. 24 1月, 2014 1 次提交
  5. 03 3月, 2013 1 次提交
  6. 01 2月, 2013 1 次提交
  7. 26 7月, 2011 1 次提交
  8. 02 11月, 2009 1 次提交
    • K
      MIPS: Fix machine check exception in kmap_coherent() · 0f334a3e
      Kevin Cernekee 提交于
      On an SMP system with cache aliases, the following sequence of events may
      happen:
      
      1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a
         temporary mapping in the fixmap region
      2) copy_page() starts on CPU0
      3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page()
      4) CPU0 takes the interrupt, interrupting copy_page()
      5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again
      6) The second invocation of kmap_coherent() on CPU0 tries to use the
         same fixmap virtual address that was being used by copy_user_highpage()
      7) CPU0 throws a machine check exception for the TLB address conflict
      
      Fixed by creating an extra set of fixmap entries for use in interrupt
      handlers.  This prevents fixmap VA conflicts between copy_user_highpage()
      running in user context, and local_r4k_flush_cache_page() invoked from an
      SMP IPI.
      Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      0f334a3e
  9. 18 9月, 2009 1 次提交
  10. 14 5月, 2009 1 次提交
    • R
      MIPS: Fix highmem. · bb86bf28
      Ralf Baechle 提交于
      Commit 35133692 (kernel.org) rsp.
      b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (linux-mips.org):
      
      > From: Chris Dearman <chris@mips.com>
      > Date: Wed, 19 Sep 2007 00:58:24 +0100
      > Subject: [PATCH] [MIPS] Allow setting of the cache attribute at run time.
      >
      > Slightly tacky, but there is a precedent in the sparc archirecture code.
      
      introduces the variable _page_cachable_default, which defaults to zero and.
      is used to create the prototype PTE for __kmap_atomic in
      arch/mips/mm/init.c:kmap_init before initialization in
      arch/mips/mm/c-r4k.c:coherency_setup, so the default value of 0 will be
      used as the CCA of kmap atomic pages which on many processors is not a
      defined CCA value and may result in writes to kmap_atomic pages getting
      corrupted.  Debugged by Jon Fraser (jfraser@broadcom.com).
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      bb86bf28
  11. 11 10月, 2008 1 次提交
  12. 29 1月, 2008 1 次提交
  13. 12 10月, 2007 1 次提交
  14. 22 10月, 2006 1 次提交
  15. 30 6月, 2006 1 次提交
  16. 26 4月, 2006 1 次提交
  17. 30 10月, 2005 1 次提交
  18. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4