- 15 3月, 2017 1 次提交
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由 Lucas Stach 提交于
This adds support for the i.MX6 QuadPlus PRE units. Currently only linear prefetch into SRAM is supported, other modes of operation like the tiled-to-linear conversion will be added later. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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- 19 9月, 2016 1 次提交
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由 Steve Longerbeam 提交于
This patch implements image conversion support using the IC tasks, with tiling to support scaling to and from images up to 4096x4096. Image rotation is also supported. Image conversion requests are added to a run queue under the IC tasks. The internal API is subsystem agnostic (no V4L2 dependency except for the use of V4L2 fourcc pixel formats). Callers prepare for image conversion by calling ipu_image_convert_prepare(), which initializes the parameters of the conversion. The caller passes in the ipu and IC task to use for the conversion, the input and output image formats, a rotation mode, and a completion callback and completion context pointer: struct ipu_image_converter_ctx * ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task, struct ipu_image *in, struct ipu_image *out, enum ipu_rotate_mode rot_mode, ipu_image_converter_cb_t complete, void *complete_context); A new conversion context is created that is added to an IC task context queue. The caller is given the new conversion context, which can then be passed to the further APIs: int ipu_image_convert_queue(struct ipu_image_converter_run *run); This queues the given image conversion request run to a run queue, and starts the conversion immediately if the run queue is empty. Only the physaddr's of the input and output image buffers are needed, since the conversion context was created previously with ipu_image_convert_prepare(). When the conversion completes, the run pointer is returned to the completion callback. void ipu_image_convert_abort(struct ipu_image_converter_ctx *ctx); This will abort any active or pending conversions for this context. Any currently active or pending runs belonging to this context are returned via the completion callback with an error status. void ipu_image_convert_unprepare(struct ipu_image_converter_ctx *ctx); Unprepares the conversion context. Any active or pending runs will be aborted by calling ipu_image_convert_abort(). Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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- 29 8月, 2016 1 次提交
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由 Steve Longerbeam 提交于
Adds the Video Deinterlacer (VDIC) unit. Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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- 02 9月, 2014 2 次提交
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由 Steve Longerbeam 提交于
Adds the Image Converter (IC) unit. Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com> Condensed the three CSC setup functions into a single one that uses static tables to set up the CSC task parameters. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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由 Steve Longerbeam 提交于
Adds the Camera Sensor Interface (CSI) unit required for video capture. Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com> Removed the unused clk_get_rate in ipu_csi_init_interface and the ipu_csi_ccir_err_detection_enable/disable functions. Checkpatch cleanup. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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- 18 8月, 2014 1 次提交
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由 Steve Longerbeam 提交于
Move channel parameter memory setup functions and macros into a new submodule ipu-cpmem. In the process, cleanup arguments to the functions to take a channel pointer instead of a pointer into cpmem for that channel. That allows the structure of the parameter memory to be private to ipu-cpmem.c. Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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- 04 6月, 2014 2 次提交
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由 Philipp Zabel 提交于
The Sensor Multi Fifo Controller (SMFC) is used as a buffer between the two CSIs (writing simultaneously) and up to four IDMAC channels. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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由 Philipp Zabel 提交于
The i.MX Image Processing Unit (IPU) contains a number of image processing blocks that sit right in the middle between DRM and V4L2. Some of the modules, such as Display Controller, Processor, and Interface (DC, DP, DI) or CMOS Sensor Interface (CSI) and their FIFOs could be assigned to either framework, but others, such as the dma controller (IDMAC) and image converter (IC) can be used by both. The IPUv3 core driver provides an internal API to access the modules, to be used by both DRM and V4L2 IPUv3 drivers. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 22 9月, 2012 1 次提交
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由 Sascha Hauer 提交于
The IPU is the Image Processing Unit found on i.MX51/53/6 SoCs. It features several units for image processing, this patch adds support for the units needed for Framebuffer support, namely: - Display Controller (dc) - Display Interface (di) - Display Multi Fifo Controller (dmfc) - Display Processor (dp) - Image DMA Controller (idmac) This patch is based on the Freescale driver, but follows a different approach. The Freescale code implements logical idmac channels and the handling of the subunits is hidden in common idmac code pathes in big switch/case statements. This patch instead just provides code and resource management for the different subunits. The user, in this case the framebuffer driver, decides how the different units play together. The IPU has other units missing in this patch: - CMOS Sensor Interface (csi) - Video Deinterlacer (vdi) - Sensor Multi FIFO Controler (smfc) - Image Converter (ic) - Image Rotator (irt) Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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