- 12 1月, 2015 1 次提交
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由 Alexander Stein 提交于
atmel_lcdfb needs also uses hclk clock, but AT91SAM9263 doesn't have that specific clock, so use lcd_clk twice. The same was done in arch/arm/mach-at91/at91sam9263.c Signed-off-by: NAlexander Stein <alexanders83@web.de> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 19 11月, 2014 2 次提交
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由 Boris Brezillon 提交于
Add GPBR (General Purpose Block Backup Registers) nodes. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Boris Brezillon 提交于
at91sam926x, at91sam9g45 and at91sam9rl SoCs all have at least one RTT block. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 03 11月, 2014 1 次提交
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由 Alexander Stein 提交于
Add the missing CAN devices node including their pin muxing. The required clock node already exists. Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 22 10月, 2014 1 次提交
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由 Boris Brezillon 提交于
PLLB input and output ranges were wrongly copied from at91sam9261 as the datasheet didn't mention explicitly PLLB. Correct their values. This fixes USB. Reported-by: NAndreas Henriksson <andreas.henriksson@endian.se> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: NAndreas Henriksson <andreas.henriksson@endian.se> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 24 9月, 2014 1 次提交
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由 Andreas Henriksson 提交于
As discovered on a custom board similar to at91sam9263ek and basing its devicetree on that one apparently the pin muxing doesn't get set up properly. This was discovered since the custom boards u-boot does funky stuff with the pin muxing and leaved it set to SPI which made the MMC driver not work under Linux. The fix is simply to define the given configuration as the default. This probably worked by pure luck before, but it's better to make the muxing explicitly set. Signed-off-by: NAndreas Henriksson <andreas.henriksson@endian.se> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: <stable@vger.kernel.org> # 3.11+
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- 15 7月, 2014 1 次提交
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由 Maxime Ripard 提交于
The G45 and 9263 SoCs has two identical ram controller, that are defined as a single node, with two reg cells. The proper way to support such a case is to have two separate DT nodes. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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- 10 7月, 2014 1 次提交
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由 Alexandre Belloni 提交于
Define the at91sam9263 clocks in the SoC dtsi file. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 08 2月, 2014 1 次提交
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由 Jean-Jacques Hiblot 提交于
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@traphandler.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 29 1月, 2014 1 次提交
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由 Boris BREZILLON 提交于
Set default watchdog options in every SoC compatible with the sam9 watchdog. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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- 20 12月, 2013 1 次提交
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由 Bo Shen 提交于
Add PWM device node for AT91 series SoC. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 09 12月, 2013 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 01 6月, 2013 1 次提交
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由 Boris BREZILLON 提交于
This patch adds pinctrl configurations for at91 Timer Counter blocks. These pin definitions can be referenced by "atmel,tcb-pwm" devices to setup pins as PWM output for instance. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> [nicolas.ferre@atmel.com: switch to pinctrl pre-processor macros] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 23 5月, 2013 1 次提交
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由 Lorenzo Pieralisi 提交于
This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 17 5月, 2013 4 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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to prepare the switch to the macro. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 24 4月, 2013 2 次提交
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由 Wenyou Yang 提交于
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Tested-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Richard Genoud 提交于
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> [wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45 and sam9n12] [wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts files] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 12 1月, 2013 1 次提交
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由 Bo Shen 提交于
Add pinctrl support for SSC on AT91 dtsi files. Signed-off-by: NBo Shen <voice.shen@atmel.com> [nicolas.ferre@atmel.com: split dtsi and driver changes] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reluctantly-acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 15 12月, 2012 1 次提交
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由 Bo Shen 提交于
Change the value of status to disabled to keep the consistent Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 20 11月, 2012 2 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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由 Ludovic Desroches 提交于
Add mci controller nodes to atmel SOCs. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 19 11月, 2012 3 次提交
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as we just use the rts and not the rts & cts for rs485 Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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USART are the full pin uart DBGU the debug Unit UART the two pin uart Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 16 11月, 2012 1 次提交
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由 Fabio Porcedda 提交于
Tested on an at91sam9260 board (evk-pro3). Signed-off-by: NFabio Porcedda <fabio.porcedda@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 07 11月, 2012 1 次提交
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由 Bo Shen 提交于
Add atmel-ssc for device tree support Match "atmel,at91rm9200-ssc" for using pdc for data transfer Match "atmel,at91sam9g45-ssc" for using dma for data transfer Signed-off-by: NBo Shen <voice.shen@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 10月, 2012 4 次提交
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Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Fix also the reg size as we have 512 bytes bank not 256 bytes per gpio/mux controller Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 17 9月, 2012 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Tested-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 12 9月, 2012 1 次提交
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由 Ludovic Desroches 提交于
Add TWI nodes for atmel SoCs but keep i2c-gpio ones in order to let the choice to the user in dts files. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
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- 02 7月, 2012 2 次提交
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由 Ludovic Desroches 提交于
Add a third cell to define irq priority. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 20 4月, 2012 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 15 4月, 2012 1 次提交
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由 Rob Herring 提交于
These were incorrectly introduced and can cause problems for of_irq_init. The correct way to define a root controller is no interrupt-parent set at all or the interrupt-parent is set to the root controller itself when inherited from a parent node. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Tested-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 05 4月, 2012 1 次提交
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由 Ludovic Desroches 提交于
Because of the inclusion of skeleton.dtsi, the memory node is named "memory" we where not modifying the already included one but creating a new one. It caused bad memory node detection during early_init_dt_scan_memory() so we modify them. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: devicetree-discuss@lists.ozlabs.org
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