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  1. 28 10月, 2011 2 次提交
  3. 29 8月, 2011 1 次提交
    • Y
      sh: fix the compile error in setup-sh7757.c · 21d41f2b
      由 Yoshihiro Shimoda 提交于 
      Fix the following build errors:

  CC      arch/sh/kernel/cpu/sh4a/setup-sh7757.o
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: implicit declaration of function ‘DMA_BIT_MASK’
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: initializer element is not constant
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: (near initialization for ‘usb_ehci_device.dev.coherent_dma_mask’)
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:705: error: initializer element is not constant
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:705: error: (near initialization for ‘usb_ohci_device.dev.coherent_dma_mask’)
make[3]: *** [arch/sh/kernel/cpu/sh4a/setup-sh7757.o] Error 1
Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      21d41f2b
  5. 11 7月, 2011 14 次提交
  7. 01 7月, 2011 1 次提交
    • P
      perf, arch: Add generic NODE cache events · 89d6c0b5
      由 Peter Zijlstra 提交于 
      Add a NODE level to the generic cache events which is used to measure
local vs remote memory accesses. Like all other cache events, an
ACCESS is HIT+MISS, if there is no way to distinguish between reads
and writes do reads only etc..

The below needs filling out for !x86 (which I filled out with
unsupported events).

I'm fairly sure ARM can leave it like that since it doesn't strike me as
an architecture that even has NUMA support. SH might have something since
it does appear to have some NUMA bits.

Sparc64, PowerPC and MIPS certainly want a good look there since they
clearly are NUMA capable.
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Cc: David Miller <davem@davemloft.net>
Cc: Anton Blanchard <anton@samba.org>
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/1303508226.4865.8.camel@laptopSigned-off-by: NIngo Molnar <mingo@elte.hu>
      89d6c0b5
  9. 29 6月, 2011 2 次提交
  11. 21 6月, 2011 1 次提交
  13. 20 6月, 2011 1 次提交
  15. 16 6月, 2011 1 次提交
  17. 14 6月, 2011 1 次提交
    • P
      serial: sh-sci: Abstract register maps. · 61a6976b
      由 Paul Mundt 提交于 
      This takes a bit of a sledgehammer to the horribly CPU subtype
ifdef-ridden header and abstracts all of the different register layouts
in to distinct types which in turn can be overriden on a per-port basis,
or permitted to default to the map matching the port type at probe time.

In the process this ultimately fixes up inumerable bugs with mismatches
on various CPU types (particularly the legacy ones that were obviously
broken years ago and no one noticed) and provides a more tightly coupled
and consolidated platform for extending and implementing generic
features.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      61a6976b
  19. 31 3月, 2011 1 次提交
  21. 11 3月, 2011 3 次提交
  23. 12 1月, 2011 5 次提交
  25. 29 11月, 2010 1 次提交
  27. 26 11月, 2010 2 次提交
  29. 08 11月, 2010 1 次提交
  31. 02 11月, 2010 1 次提交
  33. 27 10月, 2010 1 次提交
    • P
      sh: oprofile: Fix up and extend op_name_from_perf_id(). · 2e4f17d2
      由 Paul Mundt 提交于 
      op_name_from_perf_id() currently returns a local variable, which isn't
terribly productive. As we only handle a single PMU case for now, simply
allocate and free the string from the arch init/exit context and have
op_name_from_perf_id() hand back the cached string.

This also takes UTS_MACHINE in to account, given that we build for
multiple architectures.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      2e4f17d2
  35. 13 10月, 2010 1 次提交