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  1. 11 5月, 2011 10 次提交
    • A
      OMAP: DSS2: DSI: Introduce sync_vc functions · cf398fb3
      由 Archit Taneja 提交于 
      The DSI protocol engine has no interrupt for signalling the end of a Frame
transfer. The present approach is to send a BTA after DISPC generates a
FRAMEDONE interrupt, and unlock the dsi bus only when the BTA Ack is received.

The assumption made with this approach was that OMAP will send a BTA only after
the long packet corresponding to the last line is sent. However, it is possible
that on the DISPC FRAMEDONE interrupt there are 2 (or more) lines of pixel data
in the DSI line buffer. Hence, the BTA Ack could be received for the long packet
corresponding to the second last line (or the third last and so on..).
Therefore, the current method doesn't ensure that the complete frame data is
sent before we start a new transfer. A similar explanation holds valid if we
send a BTA in between multiple short/long command packets from the slave port.

Introduce dsi_sync_vc functions, based on Tomi Valkeinen's idea, which ensure
that the DSI Virtual Channel in use(update_channel) completes its previous work
before proceeding to the next Frame/Command.

For a frame update, the DSI driver now sends a callback to the Panel Driver
on the FRAMEDONE interrupt itself. The callback in the panel driver then unlocks
the bus. dsi_sync_vc() functions are placed in dsi_vc_config_l4() and
dsi_vc_config_vp() to ensure that the previous task of the Virtual Channel is
completed.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      cf398fb3
    • A
      OMAP4: DSS2: Register configuration changes for DSI · 9613c02b
      由 Archit Taneja 提交于 
      The following changes have changed from OMAP3 to OMAP4 DSI:
-The register field DSI_PLL_FREQSEL in DSI_PLL_CONFIGURATION2 has been removed.
-DCS_CMD_ENABLE and DCS_CMD_CODE bits have been moved from DSI_CTRL to
DSI_VC_CTRLi, hence the control of the bits is available per VC.
-DSI LDO powergood notification doesn't work on OMAP4. This is mentioned in
OMAP4 errata revision 1.8(Errata 1.76).
-OCP_WIDTH register field is included in DSI_VC_CTRL.
-The SCP clock is also required to access DSI PLL registers

Introduce dss features for these changes so that DSI runs on both OMAP3 and
OMAP4.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      9613c02b
    • T
      OMAP: DSS2: fix panel Kconfig dependencies · 2783fa84
      由 Tomi Valkeinen 提交于 
      All DPI panels were missing dependency to OMAP2_DSS_DPI. Add the
dependency.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      2783fa84
    • T
      OMAP: DSS2: DSI: Fix DSI PLL power bug · c94dfe05
      由 Tomi Valkeinen 提交于 
      OMAP3630 has a HW bug causing DSI PLL power command POWER_ON_DIV (0x3)
to not work properly. The bug prevents us from enabling DSI PLL power
only to HS divider block.

This patch adds a dss feature for the bug and converts POWER_ON_DIV
requests to POWER_ON_ALL (0x2).
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      c94dfe05
    • A
      OMAP: DSS2: Fix: Return correct lcd clock source for OMAP2/3 · 89976f29
      由 Archit Taneja 提交于 
      dss.lcd_clk_source is set to the default value DSS_CLK_SRC_FCK at dss_init.
For OMAP2 and OMAP3, the dss.lcd_clk_source should always be the same as
dss.dispc_clk_source. The function dss_get_lcd_clk_source() always returns the
default value DSS_CLK_SRC_FCK for OMAP2/3. This leads to wrong clock dumps when
dispc_clk_source is not DSS_CLK_SRC_FCK.

Correct this function to always return dss.dispc_clk_source for OMAP2/3.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      89976f29
    • T
      OMAP: DSS2: DSI: fix dsi_dump_clocks() · a9a6500b
      由 Tomi Valkeinen 提交于 
      On OMAP4, reading DSI_PLL_CONFIGURATION2 register requires the L3 clock
(CIO_CLK_ICG) to PLL. Currently dsi_dump_clocks() tries to read that
register without enabling the L3 clock, leading to crash if DSI is not
in use.

The status of the bit being read from DSI_PLL_CONFIGURATION2 is
available from dsi_clock_info->use_sys_clk, so we can avoid the whole
problem by just using that.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      a9a6500b
    • T
      OMAP: DSS2: DSI: fix use_sys_clk & highfreq · b2765092
      由 Tomi Valkeinen 提交于 
      use_sys_clk and highfreq fields in dsi.current_cinfo were never set.
Luckily they weren't used anywhere so it didn't cause any problems.

This patch fixes those fields and they are now set at the same time as
the rest of the fields.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      b2765092
    • T
      OMAP: DSS2: Move nokia-dsi-panel.h to include/video/ · 4e9f99d7
      由 Tomi Valkeinen 提交于 
      arch/arm/plat-omap/include/plat/nokia-dsi-panel.h is an include for the
OMAP DSS panel driver for Nokia's DSI displays. A more logical place for
it is in include/video.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      4e9f99d7
    • T
      OMAP: DSS2: Move panel-generic-dpi.h to include/video/ · f8ae2f08
      由 Tomi Valkeinen 提交于 
      arch/arm/plat-omap/include/plat/panel-generic-dpi.h is an include for
the OMAP DSS panel driver for generic DPI displays. A more logical place
for it is in include/video.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      f8ae2f08
    • T
      OMAP: DSS2: Move display.h to include/video/ · a0b38cc4
      由 Tomi Valkeinen 提交于 
      arch/arm/plat-omap/include/plat/display.h is an include for the OMAP DSS
driver. A more logical place for it is in include/video.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      a0b38cc4
  3. 10 5月, 2011 25 次提交
  5. 09 5月, 2011 5 次提交