Skip to content

cloud-kernel
cloud-kernel

openanolis / cloud-kernel
1 年多 前同步成功

通知 160
Star 36
Fork 7
cloud-kernel
cloud-kernel
切换分支/标签
  1. 26 2月, 2014 22 次提交
  3. 21 1月, 2014 2 次提交
  5. 20 1月, 2014 1 次提交
  7. 18 1月, 2014 1 次提交
  9. 17 1月, 2014 1 次提交
  11. 16 1月, 2014 1 次提交
  13. 15 1月, 2014 6 次提交
    • S
      pinctrl: st: Fix a typo in probe · c9dd66b7
      由 Srinivas Kandagatla 提交于 
      Probe function had commas instead of semi-colons on some of the lines.
This patch just fixes those lines. No functional chagnes done in this
patch.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c9dd66b7
    • L
      pinctrl: sirf: lock IRQs when starting them · 655dada6
      由 Linus Walleij 提交于 
      This uses the new API for tagging GPIO lines as in use by
IRQs. This enforces a few semantic checks on how the underlying
GPIO line is used.

Also assign the gpio_chip.dev pointer to be used for error
messages.

Cc: Barry Song <Baohua.Song@csr.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      655dada6
    • B
      pinctrl: sirf: put gpio interrupt pin into input status automatically · b07ddcdc
      由 Barry Song 提交于 
      busses like i2c, spi and so on can parse the virq of their subnode automatically by
irq_of_parse_and_map(). for example, i2c will do that in of_i2c_register_devices().
people can put hwirq number attached to a gpio controller in dts, and drivers can
directly request the parsed virq.

for example, for an i2c client as below,
tangoc-ts@5c{
	compatible = "pixcir,tangoc-ts";
	interrupt-parent = <&gpio>;
	interrupts = <3 0>;
	reg = <0x5c>;
};
in i2c client probe(), it will request_irq(client->irq, ...) without
calling gpio_direction_input().
so here when we set irq type, we also put the pin to input direction.
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      b07ddcdc
    • B
      pinctrl: sirf: use only one irq_domain for the whole device node · 8daeffb0
      由 Barry Song 提交于 
      in sirfsoc gpio probe(), we create 5 irq_domains for 5 gpio banks. but
in irq_create_of_mapping() of irqchip core level, irq_find_host() can
only return the 1st irq_domain attached the pinctrl dt device node as
we can see from the codes:

unsigned int irq_create_of_mapping(struct device_node *controller,
				   const u32 *intspec, unsigned int intsize)
{
	struct irq_domain *domain;
	...
	domain = controller ? irq_find_host(controller) : irq_default_domain;
}

struct irq_domain *irq_find_host(struct device_node *node)
{
	struct irq_domain *h, *found = NULL;
	int rc;

	/* We might want to match the legacy controller last since
	 * it might potentially be set to match all interrupts in
	 * the absence of a device node. This isn't a problem so far
	 * yet though...
	 */
	mutex_lock(&irq_domain_mutex);
	list_for_each_entry(h, &irq_domain_list, link) {
		if (h->ops->match)
			rc = h->ops->match(h, node);
		else
			rc = (h->of_node != NULL) && (h->of_node == node);

		if (rc) {
			found = h;
			break;
		}
	}
	mutex_unlock(&irq_domain_mutex);
	return found;
}

for sirfsoc, the 1st irq_domain attached to the device_node(controller) only
can do linear for the 1st 32 gpios. so for devices who use gpio hwirq above
32 and put the information in dt like:
                                tangoc-ts@5c{
                                        compatible = "pixcir,tangoc-ts";
+                                       interrupt-parent = <&gpio>;
+                                       interrupts = <34 0>;
                                };

we will fail to get the virq for these devices as hwirq will be bigger than
domain->revmap_data.linear.size in:
unsigned int irq_linear_revmap(struct irq_domain *domain,
			       irq_hw_number_t hwirq)
{

	/* Check revmap bounds; complain if exceeded */
	if (WARN_ON(hwirq >= domain->revmap_data.linear.size))
		return 0;

	return domain->revmap_data.linear.revmap[hwirq];
}

this patch drops redundant irq_domain and keep only one to fix the problem.
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      8daeffb0
    • T
      pinctrl: single: fix infinite loop caused by bad mask · ad5d25fe
      由 Tomi Valkeinen 提交于 
      commit 4e7e8017 (pinctrl: pinctrl-single:
enhance to configure multiple pins of different modules) improved
support for pinctrl-single,bits option, but also caused a regression
in parsing badly configured mask data.

If the masks in DT data are not quite right,
pcs_parse_bits_in_pinctrl_entry() can end up in an infinite loop,
trashing memory at the same time.

Add a check to verify that each loop actually removes bits from the
'mask', so that the loop can eventually end.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      ad5d25fe
    • T
      pinctrl: single: fix pcs_disable with bits_per_mux · dd4c2b3c
      由 Tomi Valkeinen 提交于 
      pcs_enable() uses vals->mask instead of pcs->fmask when bits_per_mux is
enabled. However, pcs_disable() always uses pcs->fmask.

Fix pcs_disable() to use vals->mask with bits_per_mux.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      dd4c2b3c
  15. 14 1月, 2014 1 次提交
  17. 08 1月, 2014 5 次提交