Commit 5622f295 ("x86, perf_counter, bts: Optimize BTS overflow
handling") removed the regs field from struct perf_sample_data and
added a regs parameter to perf_counter_overflow().  This breaks the
build on powerpc (and Sparc) as reported by Sachin Sant:

  arch/powerpc/kernel/perf_counter.c: In function 'record_and_restart':
  arch/powerpc/kernel/perf_counter.c:1165: error: unknown field 'regs' specified in initializer

This adjusts arch/powerpc/kernel/perf_counter.c to correspond with the
new struct perf_sample_data and perf_counter_overflow().

[ v2: also fix Sparc, Markus Metzger <markus.t.metzger@intel.com> ]
Reported-by: NSachin Sant <sachinp@in.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
Cc: Markus Metzger <markus.t.metzger@intel.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: benh@kernel.crashing.org
Cc: linuxppc-dev@ozlabs.org
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <19127.8400.376239.586120@drongo.ozlabs.ibm.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Dave noticed that we leak the PMU resource reservations when we
fail the hardware counter init.
Reported-by: NDavid Miller <davem@davemloft.net>
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: NDavid Miller <davem@davemloft.net>
LKML-Reference: <1252483487.7746.164.camel@twins>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

The "end of a C state" trace point currently happens before
the code runs that corrects the TSC for having stopped during idle.

The result of this is that the timestamp of the end-of-C-state event
is garbage on cpus where the TSC stops during idle.

This patch moves the end point of the C state to after the timekeeping
engine of the kernel has been corrected.
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
Cc: Len Brown <len.brown@intel.com>
Cc: fweisbec@gmail.com
Cc: peterz@infradead.org
Cc: Paul Mackerras <paulus@samba.org>
LKML-Reference: <20090919133533.139c2a46@infradead.org>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

This patch converts the existing power tracer into an event tracer,
so that power events (C states and frequency changes) can be
tracked via "perf".

This also removes the perl script that was used to demo the tracer;
its functionality is being replaced entirely with timechart.
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <20090912130542.6d314860@infradead.org>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Draining the BTS buffer on a buffer overflow interrupt takes too
long resulting in a kernel lockup when tracing the kernel.

Restructure perf_counter sampling into sample creation and sample
output.

Prepare a single reference sample for BTS sampling and update the
from and to address fields when draining the BTS buffer. Drain the
entire BTS buffer between a single perf_output_begin() /
perf_output_end() pair.
Signed-off-by: NMarkus Metzger <markus.t.metzger@intel.com>
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <20090915130023.A16204@sedona.ch.intel.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Recent enhancement of rb-tree based lookup exposed a  bug with the lookup
mechanism in the reserve_memtype() which ensures that there are no conflicting
memtype requests for the memory range.

memtype_rb_search() returns an entry which has a start address <= new start
address. And from here we traverse the linear linked list to check if there
any conflicts with the existing mappings. As the rbtree is based on the
start address of the memory range, it is quite possible that we have several
overlapped mappings whose start address is much less than new requested start
but the end is >= new requested end. This results in conflicting memtype
mappings.

Same bug exists with the old code which uses cached_entry from where
we traverse the linear linked list. But the new rb-tree code exposes this
bug fairly easily.

For now, don't use the memtype_rb_search() and always start the search from
the head of linear linked list in reserve_memtype(). Linear linked list
for most of the systems grow's to few 10's of entries(as we track memory type
of RAM pages using struct page). So we should be ok for now.

We still retain the rbtree and use it to speed up free_memtype() which
doesn't have the same bug(as we know what exactly we are searching for
in free_memtype).

Also use list_for_each_entry_from() in free_memtype() so that we start
the search from rb-tree lookup result.
Reported-by: NMarkus Trippelsdorf <markus@trippelsdorf.de>
Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
LKML-Reference: <1253136483.4119.12.camel@sbs-t61.sc.intel.com>
Signed-off-by: NH. Peter Anvin <hpa@zytor.com>

commit 85bac32c
    ring-buffer: only enable ring_buffer_swap_cpu when needed
broke oprofile (at least on s390, but likely on all platforms).

this patch lets oprofile select RING_BUFER_ALLOW_SWAP to make
ring_buffer_swap_cpu usable for oprofile.
Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
LKML-Reference: <200909162156.49239.borntraeger@de.ibm.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Robert Richter <robert.richter@amd.com>
Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>

Signed-off-by: NMaxime Bizon <mbizon@freebox.fr>
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NMaxime Bizon <mbizon@freebox.fr>
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Todo: Nothing ever detects CPU_BCM6338 but the code tests for it anyway.
Signed-off-by: NMaxime Bizon <mbizon@freebox.fr>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

There is a bunch of platform device registration in
arch/mips/cavium-octeon/setup.c.  We move it to its own file in
preparation for adding more platform devices.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The code after the vmalloc_fault: label in do_page_fault() modifies
user page tables, this is not correct for 64-bit kernels.

For 64-bit kernels we should go straight to the no_context handler
skipping vmalloc_fault.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

By combining swapper_pg_dir and module_pg_dir, several if conditions
can be eliminated from the tlb exception handler. The reason they
can be combined is that, the effective virtual address of vmalloc
returned is at the bottom, and of module_alloc returned is at the
top. It also fixes the bug in vmalloc(), which happens when its
return address is not covered by the first pgd.
Signed-off-by: NWu Fei <at.wufei@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

loops_per_jiffy depends on coreclk speed;  preset it instead of
letting the kernel waste precious microseconds trying to approximate it.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add a platform device for the Octeon Random Number Generator (RNG).
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Acked-by: NHerbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Eliminate the 'allow_au1k_wait' variable.  MIPS kernel installs the
Alchemy-specific wait code before timer initialization;  if the C0
timer must be used for timekeeping the wait function is set to NULL
which means no wait implementation is available.

As a sideeffect, the 'wait instruction available' output in
/proc/cpuinfo now correctly indicates whether 'wait' is usable.

Run-tested on DB1200.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

On some CPUs, it is more efficient to disable and enable interrupts in the
kernel rather than use ll/sc for atomic operations.  But if we were to set
cpu_has_llsc to false, we would break the userspace futex interface (in
asm/futex.h).

We separate the two concepts, with a new predicate kernel_uses_llsc, that
lets us disable the kernel's use of ll/sc while still allowing the futex
code to use it.

Also there were a couple of cases in bitops.h where we were using ll/sc
unconditionally even if cpu_has_llsc were false.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

CONFIG_CPU_HAS_LLSC duplicated the function of cpu_has_llsc for no good
reason and and the results if the one was enabled and the other disabled
was very unobvious.  Remove it now that there are no more remaining users.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

All CPUs for Malta support LL/SC.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This also means there is now only one implementation not 3 left.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This way it doesn't have to use CONFIG_CPU_HAS_LLSC anymore.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch results in fewer output sections and in some data being
reordered, but should have no functional impact.
Signed-off-by: NNelson Elhage <nelhage@ksplice.com>
Signed-off-by: NTim Abbott <tabbott@ksplice.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Now that PAGE_SIZE is available to assembly directly, there is no need
to separately expose it as _PAGE_SIZE through asm-offsets.

In addition, remove _PAGE_SHIFT from asm-offsets, since it was never
needed, and is not used anywhere.
Signed-off-by: NNelson Elhage <nelhage@ksplice.com>
Signed-off-by: NTim Abbott <tabbott@ksplice.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NChristoph Hellwig <hch@lst.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch makes the board code register the ar7_wdt driver as a platform
device. We move the dynamic resource calculation here since the driver
should not be aware of the AR7 SoC version it is running on.
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Because only gcc >=4.4 have loongson-specific support, we need to choose
the suitable -march argument for gcc <= 4.3 and gcc >= 4.4, and here, we
use -march=loongson2e for loongson2e.

Thanks goes to Arnaud Patard <apatard@mandriva.com> for suggestion of
using cc-options(Documentation/kbuild/makefiles.txt). and thanks Zhang
Le for introducing the new CPU_LOONGSON2E kernel option.

NOTE: -mtune option is not need if -march and -mtune use the same value.
Signed-off-by: NZhang Le <r0bertz@gentoo.org>
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The difference between some loongson-based machines is very small, so, if
there is no necessary to add new kernel config options to cope with this
difference, it will be better to share the same kernel image file between
them, benefit from this, the linux distribution developers only have a need
to compile the kernel one time.

This machtype kernel command line argument will be used later to share the
same kernel image file between two different machines(menglong & yeeloong)
made by lemote.

Thanks very much to Zhang Le for cleaning up the machtype implementation.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

To share common loongson source code between all of the loongson-based
machines. there is a need to split it out of the fuloong-2e/ directory.
at the same time, other according tuning is needed. the machine-specific
parts are defined as macros in relative header file, pci.h, mem.h,
machine.h.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

To make source code of loongson sharable to the machines(such as gdium)
made by the other companies, we rename arch/mips/lemote to
arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e
to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to
FULOONG2E to make it distinguishable to the future FULOONG2F.  and also,
some other relative tuning is needed.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This kernel support is needed by the user-space tool:oprofile to profile
linux kernel or applications via loongson2 performance counters. you can
enable this driver via CONFIG_OPROFILE = y or m.

On Loongson2 there are two performance counters, each one can count 16
events respectively. when anyone of the performance counter overflows, an
interrupt will be generated and is routed to the IRQ MIPS_CPU_IRQ_BASE + 6.
Signed-off-by: NYanhua <yanh@lemote.com>
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

RTC_LIB is selected by MIPS by default, and therefore, the legacy RTC
driver is disabled. but fortunately, RTC_LIB not works on fulong, so,
enabling the legcy RTC driver is needed, otherwise, the tools like
hwclock will not work.
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Fixup the wrong original comment of pcimap, and make the source code more
understandable. and also, some new extra consideration is added in.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

With the help of script/checkpatch.pl, i have cleaned up the coding
style.

1. remove un-needed header files and tune some comments.
2. remove some un-needed { }

add a new header file loongson.h:

3. move some common header files to loongson.h
4. move some common extern declartions to loongson.h

and this new header file is needed for future loongson2f support.
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch split the old initilization and setup implementation to
several file, one file one logic function.

the other main changes include:

	1. as the script/checkpatch.pl suggests, use strict_strtol instead
	of simple_strtol in arch/mips/lemote/lm2e/cmdline.c

	2. use the existed macros in asm/mips-boards/bonito64.h as the
	arguments of set_io_port_base() and remove the un-needed ones in
	asm/mach-lemote/pci.h
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

mips_io_port_base is initialized via set_io_port_base() in
arch/mips/lemote/lm2e/setup.c, we can use it directly here.
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Several magic numbers have been replaced by relative macros, which will be
more readable and understandable.
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>