- 29 7月, 2015 4 次提交
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由 David Liu 提交于
This patch enables raw Rx/Tx encap mode to support software based crypto engine. This patch introduces a new module param 'cryptmode'. cryptmode: 0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX encapsulation to the firmware. This is the default mode. 1: Use sofware crypto engine globally with raw mode TX/RX encapsulation to the firmware. Known limitation: A-MSDU must be disabled for RAW Tx encap mode to perform well when heavy traffic is applied. Testing: (by Michal Kazior <michal.kazior@tieto.com>) a) Performance Testing cryptmode=1 ap=qca988x sta=killer1525 killer1525 -> qca988x 194.496 mbps [tcp1 ip4] killer1525 -> qca988x 238.309 mbps [tcp5 ip4] killer1525 -> qca988x 266.958 mbps [udp1 ip4] killer1525 -> qca988x 477.468 mbps [udp5 ip4] qca988x -> killer1525 301.378 mbps [tcp1 ip4] qca988x -> killer1525 297.949 mbps [tcp5 ip4] qca988x -> killer1525 331.351 mbps [udp1 ip4] qca988x -> killer1525 371.528 mbps [udp5 ip4] ap=killer1525 sta=qca988x qca988x -> killer1525 331.447 mbps [tcp1 ip4] qca988x -> killer1525 328.783 mbps [tcp5 ip4] qca988x -> killer1525 375.309 mbps [udp1 ip4] qca988x -> killer1525 403.379 mbps [udp5 ip4] killer1525 -> qca988x 203.689 mbps [tcp1 ip4] killer1525 -> qca988x 222.339 mbps [tcp5 ip4] killer1525 -> qca988x 264.199 mbps [udp1 ip4] killer1525 -> qca988x 479.371 mbps [udp5 ip4] Note: - only open network tested for RAW vs nwifi performance comparison - killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps) - used iperf - OTA, devices a few cm apart from each other, no shielding - tcpX/udpX, X - means number of threads used Overview: - relative Tx performance drop is seen but is within reasonable and expected threshold (A-MSDU must be disabled with RAW Tx) b) Connectivity Testing cryptmode=1 ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan OK Note: - each test takes all possible endpoint pairs and pings - each pair-ping flushes arp table - ip6 is used c) Testbed Topology: 1ap1sta: [ap] ---- [sta] endpoints: ap, sta 1ap1sta2br: [veth0] [ap] ---- [sta] [veth2] | | | | [veth1] | \ [veth3] \ / \ / [br0] [br1] endpoints: veth0, veth2, br0, br1 note: STA works in 4addr mode, AP has wds_sta=1 1ap1sta2br1vlan: [veth0] [ap] ---- [sta] [veth2] | | | | [veth1] | \ [veth3] \ / \ / [br0] [br1] | | [vlan0_id2] [vlan1_id2] endpoints: vlan0_id2, vlan1_id2 note: STA works in 4addr mode, AP has wds_sta=1 Credits: Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the amsdu issue, contributed a workaround (already squashed into this patch), and contributed the throughput and connectivity tests results. Signed-off-by: NDavid Liu <cfliu.tw@gmail.com> Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Tested-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Qi Zhou 提交于
During tx completion, tx_lock is held for longer than required, preventing efficient refill of htt->pending_tx. Refactor the code so that only MSDU related operations are protected by the lock. Improves downstream performance on a dual-core ARM Freescale LS1024A (f.k.a. Mindspeed Comcerto 2000) AP with a 3x3 client from 495 to 580 Mbps. Other CPU bound multicore systems may also benefit. Signed-off-by: NDenton Gentry <dgentry@google.com> Signed-off-by: NAvery Pennarun <apenwarr@google.com> [mfaltesek@google.com: removed conflicting code for tracking msdu_ids.] Signed-off-by: NMarty Faltesek <mfaltesek@google.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Kevin Darbyshire-Bryant 提交于
When using DFS channels on Ath10k, kernel log has repeated warning message 'failed to process fft: -22' typically under medium/heavy traffic. This patch switches the warnings to driver debug (WMI events) mode only thus reducing log file noise. DFS and spectral scan share underlying HW mechanisms and enabling one (DFS) enables the other (spectral scan) as far as event reporting from firmware to driver is concerned. Spectral scan events take no part in processing of DFS radar pulses which are delivered as distinct events, so the fft (spectral event) warning is harmless and DFS interference detection/protection still occurs. Symptoms seen & fix tested in both debug & non-debug modes on TP-Link Archer C7 v2 platform. Signed-off-by: NKevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Nik Nyby 提交于
This fixes two misspellings of "distribution" in a comment. Signed-off-by: NNik Nyby <nikolas@gnu.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 24 7月, 2015 7 次提交
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由 Raja Mani 提交于
HTT_H2T_MSG_TYPE_MGMT_TX msg in 10.4 firmware carries additional 4 byte in htt_mgmt_tx_desc where it tells to firmware that at what rate mgmt frame has to go out in the air. It's an optional parameter, setting this field to zero will force firmware to choose auto rate and send the frame out. Those 4 byte info is missed out in the current code and 10.4 firmware ended up reading some junk in those 4 byte and sometime malfunctioning. Fix it by adding 4 byte in struct htt_mgmt_tx_desc. Non 10.4 firmware will not process those four byte. So, adding 4 byte at the end of struct htt_mgmt_tx_desc will not create any impact on other chipset. Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Manikanta Pubbisetty 提交于
The patch adds support to offload TCP/UDP checksum calculations for QCA99x0. Signed-off-by: NManikanta Pubbisetty <c_mpubbi@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Maninder Singh 提交于
chandef is initialized with NULL and on the very next line, we are using it to get channel, which is not correct. Channel should be initialized after obtaining chandef. Found by cppcheck: ath/ath10k/mac.c:839]: (error) Possible null pointer dereference: chandef Signed-off-by: NManinder Singh <maninder1.s@samsung.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Peter Oh 提交于
QCA99X0 chip has an extra 4 bytes in rx_msdu_start, 20 bytes in rx_msdu_end and 20 bytes in rx_ppdu_end structure which are used in htt_rx_desc and HTT Rx ring offset setup. This is necessary for correct Rx for QCA99X0 or Rx descriptors will be overwritten and corrupted. With this patch QCA988X and QCA6174 will have extra 44 bytes padding in Rx descriptor layout which is harmless. Signed-off-by: NPeter Oh <poh@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Peter Oh 提交于
rx_ppdu_end_common structure is valid for both of qca998x and qca6174, but not for qca99x0 since it has new additional members. Hence update the common structure to cover qca99x0 as well. Signed-off-by: NPeter Oh <poh@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Peter Oh 提交于
Since QCA99X0 uses fragmentation descriptor differently from other ones on tx path, we need to handle it separately. QCA99X0 is using 48 bits for address and 16 bits for length out of 2 dword and each values have to be programmed by frag desc base addr + msdu id, so that hardware can retrieve corresponding frag data. Signed-off-by: NPeter Oh <poh@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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It is observed that during cold reset pcie access right after a write operation to SOC_GLOBAL_RESET_ADDRESS causes Data Bus Error and system hard lockup. The reason for bus error is that pcie needs some time to get back to stable state for any transaction during cold reset. Add delay of 20 msecs after write of SOC_GLOBAL_RESET_ADDRESS to fix this issue. This patch is tested on QCA988X. This is also tested on QCA99X0 which is WIP. Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 12 7月, 2015 11 次提交
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由 Zefir Kurtisi 提交于
FCC long pulse radar (type 5) requires pulses to be checked for chirping. This patch implements chirp detection based on the FFT data provided for long pulses. A chirp is detected when a set of criteria defined by FCC pulse characteristics is met, including * have at least 4 FFT samples * max_bin index moves equidistantly between samples * the gradient is within defined range The chirp detection has been tested with reference radar generating devices and proved to work reliably. Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
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由 Zefir Kurtisi 提交于
The chip reports radar pulses on extension channel even if operating in HT20 mode. This patch adds a sanity check for HT40 mode before it feeds pulses on extension channel to the pattern detector. Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
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由 Nicholas Mc Guire 提交于
commit 2c86c275 ("Add ipw2100 wireless driver.") introduced HW_PHY_OFF_LOOP_DELAY (HZ / 5000) which always evaluated to 0. Clarified by Stanislav Yakovlev <stas.yakovlev@gmail.com> that it should be 50 milliseconds thus fixed up to msecs_to_jiffies(50). Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Acked-by: NStanislav Yakovlev <stas.yakovlev@gmail.com> Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
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由 Michal Kazior 提交于
Concurrent AP/GO operation on different channels isn't really supported well by the firmware so it's better to remove it from being advertised. Also tune the way station and p2p client interface limits are expressed to allow station + 2x p2p client or station + p2p client + p2p go. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
Whenever any vdev was supposed to be paused all Tx queues were stopped (except offchannel) instead of only these associated with the given vdev. This caused subtle issues with multi-channel/multi-vif scenarios, e.g. authentication of station vif could sometimes fail depending on fw tx pause request timing. Fixes: b4aa539d ("ath10k: implement tx pause wmi event") Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
Psmode can be forcefully enabled when vdev isn't started. It isn't guaranteed that mac80211 will re-issue psmode setting after vdev is started unless actual bss_conf.ps value has changed. Even if this doesn't fix any problems now it may prevent future breakage. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
The expiration function must not be called when roc is explicitly cancelled by mac80211. However since fcf98446 ("ath10k: fix hw roc expiration") the notification was never sent when roc actually expired. This fixes some P2P connection setup issues. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
Further testing proved that multi-channel AP+STA on QCA6174 with RM.2.0-00088 should have powersave force-disabled to avoid beacon misses/skipping on either side which in turn could disrupt communication. Since AP never has arvif->ps don't even bother checking it. Other combinations may be broken as well so disallow powersave with multivif outright unless firmware advertises otherwise. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
mac80211 already does provide complete IEs for Probe Requests for hw scan and ath10k firmware was appending duplicate Supported Rates IEs unnecessarily. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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In commit 418ca599 ("ath10k: Make target cpu address to CE address conversion chip specific") mask 0x7fff is added by mistake instead of 0x7ff. Fix this regression. Fixes: 418ca599 ("ath10k: Make target cpu address to CE address conversion chip specific") Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Bartosz Markowski 提交于
commit a521ee98 ("ath10k: Add new reg_address/mask to hw register table") broke QCA61x4 support by providing wrong fw_indicator_address, which should have been 0x0003a028 instead of 0x00009028. User experience was a failing boot up sequence (crashing device during initialization): [ 181.663874] ath10k_pci 0000:02:00.0: enabling device (0000 -> 0002) [ 181.664787] ath10k_pci 0000:02:00.0: pci irq msi-x interrupts 8 irq_mode 0 reset_mode 0 [ 181.688886] ath10k_pci 0000:02:00.0: device has crashed during init [ 181.688897] ath10k_pci 0000:02:00.0: failed to wait for target after cold reset: -70 [ 181.688902] ath10k_pci 0000:02:00.0: failed to reset chip: -70 [ 181.689774] ath10k_pci: probe of 0000:02:00.0 failed with error -70 Fix it by updating the address with correct value. Fixes: a521ee98 ("ath10k: Add new reg_address/mask to hw register table") Signed-off-by: NBartosz Markowski <bartosz.markowski@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 11 7月, 2015 12 次提交
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由 Sathya Perla 提交于
Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Suresh Reddy 提交于
The SET_LOOPBACK_MODE command is always issued from ethtool only in a process context. So, while waiting for the cmd to complete, the driver can sleep instead of holding spin_lock_bh() on the mcc_lock. This is done by calling be_mcc_notify() instead of be_mcc_notify_wait() (that returns only after the cmd completes while the MCCQ is locked). Signed-off-by: NSuresh Reddy <suresh.reddy@avagotech.com> Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Suresh Reddy 提交于
This fix makes the RX_FILTER cmd asynchronous, i.e., the caller issues this cmd and doesn't wait for a completion from the FW. If the FW/adapter is in an error state, this change helps in not holding up the rtnl_lock and keeping bottom halves disabled while the driver timesout waiting for a response from the FW. Signed-off-by: NSuresh Reddy <suresh.reddy@avagotech.com> Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Suresh Reddy 提交于
When the adapter is in error state, return error from be_mcc_notify() so that the caller routines need not sleep waiting for a response. Signed-off-by: NSuresh Reddy <suresh.reddy@avagotech.com> Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Venkat Duvvuru 提交于
The "dest" field in the UDP-hdr of a TX skb is in network endian format. Convert it to host endian before accessing it. The os2bmc patch, mentioned below introduced this code. Fixes: 760c295e ("be2net: Support for OS2BMC") Signed-off-by: NVenkat Duvvuru <VenkatKumar.Duvvuru@Emulex.com> Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vasundhara Volam 提交于
In the commit a6e6ff6e ("be2net: simplify UFI compatibility checking"), a return value of "-1" was incorrectly used in place of "false". This patch fixes it. Fixes: a6e6ff6e ("be2net: simplify UFI compatibility checking") Signed-off-by: NVasundhara Volam <vasundhara.volam@avagotech.com> Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kalesh Purayil 提交于
pci_enable_device() call sets device power state to D0; there is no need doing it again. Signed-off-by: NKalesh AP <kalesh.purayil@avagotech.com> Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kalesh Purayil 提交于
The current code assumes that bridge functionality (EVB) in the adapter is enabled only when SR-IOV is enabled. This is not always true. This patch uses the GET_HSW_CONFIG FW cmd to query this from the FW. Signed-off-by: NKalesh AP <kalesh.purayil@avagotech.com> Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kalesh Purayil 提交于
This change will make be_setup_wol() routine more compact and readable by removing some duplicate code. Signed-off-by: NKalesh AP <kalesh.purayil@avagotech.com> Signed-off-by: NSathya Perla <sathya.perla@avagotech.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Krzysztof Kozlowski 提交于
platform_driver does not need to set an owner because platform_driver_register() will set it. Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David Thomson 提交于
Support manually setting the polarity to mdi or mdix Signed-off-by: NDavid Thomson <david.thomson@alliedtelesis.co.nz> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David Thomson 提交于
Pass the mdix setting from ethtool down to the phy driver, to allow driver specific implementations of manually setting the polarity. Signed-off-by: NDavid Thomson <david.thomson@alliedtelesis.co.nz> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 7月, 2015 1 次提交
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由 Aleksey S. Kazantsev 提交于
MV88E6320 and MV88E6321 are largely compatible to MV886352, but are members of a different chip family. Signed-off-by: NAleksey S. Kazantsev <ioctl@yandex.ru> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 7月, 2015 5 次提交
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由 Scott Feldman 提交于
Implement ndo_change_mtu: on MTU change, reallocate Rx ring bufs and signal HW of new port MTU value. Signed-off-by: NScott Feldman <sfeldma@gmail.com> Reviewed-by: NSimon Horman <simon.horman@netronome.com> Tested-by: NSimon Horman <simon.horman@netronome.com> Acked-by: NJiri Pirko <jiri@resnulli.us> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vaishali Thakkar 提交于
Use module_pci_driver for drivers whose init and exit functions only register and unregister, respectively. A simplified version of the Coccinelle semantic patch that performs this transformation is as follows: @a@ identifier f, x; @@ -static f(...) { return pci_register_driver(&x); } @b depends on a@ identifier e, a.x; statement S; @@ -static e(...) { -pci_unregister_driver(&x); -DBG_PRINT(INIT_DBG,"S"); - } @c depends on a && b@ identifier a.f; declarer name module_init; @@ -module_init(f); @d depends on a && b && c@ identifier b.e, a.x; declarer name module_exit; declarer name module_pci_driver; @@ -module_exit(e); +module_pci_driver(x); Signed-off-by: NVaishali Thakkar <vthakkar1994@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hariprasad Shenai 提交于
If we don't have access to the new User GTS (T5+), use the old doorbell mechanism; otherwise use the new BAR2 mechanism. Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hariprasad Shenai 提交于
Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hariprasad Shenai 提交于
Updating the driver to read the stats of only available channels. T6 and later has only 2 channels Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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