- 19 9月, 2012 2 次提交
-
-
由 Huang Shijie 提交于
The gpmi-nand driver can support the ONFI nand chip's EDO (extra data out) mode in the asynchrounous mode. In the asynchrounous mode 5, the gpmi needs 100MHz clock for the IO. But with the pll2_pfd0_352m, we can not get the 100MHz clock. So choose pll2_pfd2_396m as enfc_sel's parent. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 17 9月, 2012 4 次提交
-
-
由 Richard Zhao 提交于
- add usbmisc device - set property fsl,usbmisc for usb controllers - set disable-over-current for imx6q-sabrelite usb otg Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Conflicts: arch/arm/boot/dts/imx6q.dtsi
-
由 Shawn Guo 提交于
-
由 Shawn Guo 提交于
-
- 11 9月, 2012 20 次提交
-
-
由 Shawn Guo 提交于
It really becomes an maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx6q client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
'pinctrl_gpio_hog' is used to setup the pin functions, and it is not neccesarily used only for GPIO pins, so remove 'gpio' from its name to describe a more generic term. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Now, imx51 device tree kernel calls pinctrl to set up pins. The function used to hook up non-DT pin setup is not needed for DT boot any more. Remove it from DT image. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
With the imx51 DT board having pinctrl setup define in device tree, it's time to remove dummy pinctrl state and build in the real imx51 pinctrl support. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add pinctrl settings for the exsiting devices in imx51-babbage.dts. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Now imx53 is a device tree only platform, so the files and functions used only by non-DT kernel can be removed. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
With device tree kernel provides the equal support as those imx53 board files, it's time to remove the board files and get imx53 support device tree only. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Now, imx53 device tree kernel calls pinctrl to set up pins. The functions used to hook up non-DT pin setup is not needed for DT boot any more. Remove them from DT image. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
As all imx53 boards booting from device tree have pinctrl set up in dts, it's time to remove the dummy pinctrl state and build in the real imx53 pinctrl support. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add pinctrl settings for the exsiting devices in imx53-smd.dts. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add pinctrl settings for the exsiting devices in imx53-evk.dts. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add pinctrl settings for the exsiting devices in imx53-ard.dts. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add pinctrl settings for existing devices in imx53-qsb.dts. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
As all imx6q boards have pinctrl set up in device tree, it's time to remove the dummy pinctrl state. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add pinctrl settings for existing devices in imx6q-sabresd.dts. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add missing pinctrl of uart and enet for imx6q-arm2 board. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add missing pinctrl of usdhc and enet for imx6q-sabrelite board. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Sort iomuxc sub-nodes in name so that the node can be located a little bit easier. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Name iomuxc sub-nodes following pin function and hardware manual. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Change the indentation for property fsl,pins a little bit, so that the first and the last line get the same indentation with all other lines. Then it will be easier to copy and past any of these lines. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 08 9月, 2012 1 次提交
-
-
由 Shawn Guo 提交于
For those SoCs that have hundreds of clock outputs, their clock DT bindings could reasonably define #clock-cells as 1 and require the client device specify the index of the clock it consumes in the cell of its "clocks" phandle. Add a generic of_clk_src_onecell_get() function for this purpose. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
- 07 9月, 2012 9 次提交
-
-
由 Ulf Hansson 提交于
The smp_twd clock is based upon a prcmu_rate clock type for the PRCMU_ARMSS clock. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Michel Jaouen 提交于
The local timer clock is based on ARM subsystem clock. This patch obtains a more exact value of that clock by reading PRCMU registers. Using this increases the accuracy of the local timer events. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NRickard Andersson <rickard.andersson@stericsson.com> Signed-off-by: NMichel Jaouen <michel.jaouen@stericsson.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Ulf Hansson 提交于
The prmcu_rate clock is not gateable and has a rate which only can be fetched. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Ulf Hansson 提交于
By using CLK_GET_RATE_NOCACHE flag, we tell the clk_get_rate API to issue the hw for an updated clock rate. This can be used for a clock which rate may be updated without a client necessary modifying it. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Jonghwa Lee 提交于
This patch supports max77686 mfd's clock driver using common clock frame work. max77686 has 3 clock ouputs which all are generated from crystal oscillator and SOC can enable/disable them via I2C bus. All clocks are fixed-rate clock sources so that it doesn't supply interface for changing clock rate. Driver uses regmap API to communicate with internal register. Signed-off-by: NJonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Ulf Hansson 提交于
Remove machine specific clock implementation and switch to use new common clock framework. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Ulf Hansson 提交于
First version of clock definitions of PRCMU and PRCC clocks for the u8500 platform. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Ulf Hansson 提交于
In this first version of the clock definitions, the structure for ux500 are set. Support for u8500, u9540 and u8540 are prepared. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Ulf Hansson 提交于
First version of common clock implementation of PRCMU clocks and PRCC clocks for ux500 platforms. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
- 05 9月, 2012 1 次提交
-
-
由 Linus Walleij 提交于
There is no choice to have the RealView clocks as module for sure, so turn this config option into a boolean. Reported-by: NPawel Moll <pawel.moll@arm.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
- 01 9月, 2012 1 次提交
-
-
由 Kelvin Cheung 提交于
This adds clock support to Loongson1B SoC using the common clock infrastructure. Signed-off-by: NKelvin Cheung <keguang.zhang@gmail.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
- 29 8月, 2012 2 次提交
-
-
由 Chao Xie 提交于
Signed-off-by: NChao Xie <xiechao.mail@gmail.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
由 Chao Xie 提交于
Initialize the clocks for mmp2 Signed-off-by: NChao Xie <xiechao.mail@gmail.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
-