1. 04 12月, 2014 1 次提交
    • D
      arm64: perf: Prevent wraparound during overflow · cbbf2e6e
      Daniel Thompson 提交于
      If the overflow threshold for a counter is set above or near the
      0xffffffff boundary then the kernel may lose track of the overflow
      causing only events that occur *after* the overflow to be recorded.
      Specifically the problem occurs when the value of the performance counter
      overtakes its original programmed value due to wrap around.
      
      Typical solutions to this problem are either to avoid programming in
      values likely to be overtaken or to treat the overflow bit as the 33rd
      bit of the counter.
      
      Its somewhat fiddly to refactor the code to correctly handle the 33rd bit
      during irqsave sections (context switches for example) so instead we take
      the simpler approach of avoiding values likely to be overtaken.
      
      We set the limit to half of max_period because this matches the limit
      imposed in __hw_perf_event_init(). This causes a doubling of the interrupt
      rate for large threshold values, however even with a very fast counter
      ticking at 4GHz the interrupt rate would only be ~1Hz.
      Signed-off-by: NDaniel Thompson <daniel.thompson@linaro.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      cbbf2e6e
  2. 03 10月, 2014 1 次提交
  3. 07 4月, 2014 1 次提交
    • M
      arm64: fix !CONFIG_COMPAT build failures · ff268ff7
      Mark Salter 提交于
      Recent arm64 builds using CONFIG_ARM64_64K_PAGES are failing with:
      
        arch/arm64/kernel/perf_regs.c: In function ‘perf_reg_abi’:
        arch/arm64/kernel/perf_regs.c:41:2: error: implicit declaration of function ‘is_compat_thread’
      
        arch/arm64/kernel/perf_event.c:1398:2: error: unknown type name ‘compat_uptr_t’
      
      This is due to some recent arm64 perf commits with compat support:
      
        commit 23c7d70d:
          ARM64: perf: add support for frame pointer unwinding in compat mode
      
        commit 2ee0d7fd:
          ARM64: perf: add support for perf registers API
      
      Those patches make the arm64 kernel unbuildable if CONFIG_COMPAT is not
      defined and CONFIG_ARM64_64K_PAGES depends on !CONFIG_COMPAT. This patch
      allows the arm64 kernel to build with and without CONFIG_COMPAT.
      Signed-off-by: NMark Salter <msalter@redhat.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      ff268ff7
  4. 13 3月, 2014 1 次提交
  5. 20 12月, 2013 1 次提交
  6. 29 10月, 2013 1 次提交
  7. 25 10月, 2013 1 次提交
  8. 20 8月, 2013 4 次提交
  9. 20 6月, 2013 1 次提交
  10. 30 1月, 2013 1 次提交
  11. 04 1月, 2013 1 次提交
    • G
      ARCH: drivers remove __dev* attributes. · b881bc46
      Greg Kroah-Hartman 提交于
      This fixes up all of the smaller arches that had __dev* markings for
      their platform-specific drivers.
      
      CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
      markings need to be removed.
      
      This change removes the use of __devinit, __devexit_p, __devinitdata,
      __devinitconst, and __devexit from these drivers.
      
      Based on patches originally written by Bill Pemberton, but redone by me
      in order to handle some of the coding style issues better, by hand.
      
      Cc: Bill Pemberton <wfp5p@virginia.edu>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
      Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
      Cc: Mike Frysinger <vapier@gentoo.org>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Hirokazu Takata <takata@linux-m32r.org>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
      Cc: Jonas Bonn <jonas@southpole.se>
      Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Chen Liqin <liqin.chen@sunplusct.com>
      Cc: Lennox Wu <lennox.wu@gmail.com>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
      Cc: Bob Liu <lliubbo@gmail.com>
      Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Myron Stowe <myron.stowe@redhat.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Thierry Reding <thierry.reding@avionic-design.de>
      Cc: Greg Ungerer <gerg@uclinux.org>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>
      Cc: Mark Salter <msalter@redhat.com>
      Cc: Yong Zhang <yong.zhang0@gmail.com>
      Cc: Michael Holzheu <holzheu@linux.vnet.ibm.com>
      Cc: Cornelia Huck <cornelia.huck@de.ibm.com>
      Cc: Jan Glauber <jang@linux.vnet.ibm.com>
      Cc: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
      Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b881bc46
  12. 09 11月, 2012 1 次提交
    • W
      arm64: perf: use architected event for CPU cycle counter · f46f979f
      Will Deacon 提交于
      We currently use a fake event encoding (0xFF) to indicate CPU cycles so
      that we don't waste an event counter and can target the hardware cycle
      counter instead.
      
      The problem with this approach is that the event space defined by the
      architecture permits an implementation to allocate 0xFF for some other
      event.
      
      This patch uses the architected cycle counter encoding (0x11) so that
      we avoid potentially clashing with event encodings on future CPU
      implementations.
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      f46f979f
  13. 17 9月, 2012 1 次提交