refactored printing of the kernel warning:

"orion_mpp_conf: requested MPP%u config unavailable on this hardware\n"

which is not to be printed in case of variant_mask = 0 (unknown variant).
This check should be performed using a logical AND (&&) as opposed
to a bitwise AND (&).

Otherwise, test would fail (and message would not be printed) if
variant_mask != 1
Signed-off-by: NGerlando Falauto <gerlando.falauto@keymile.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Olof Johansson <olof@lixom.net>
Cc: Nicolas Pitre <nico@linaro.org>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The registration function for MPP now takes void __iomem pointers, so
we remove the temporary "unsigned long" casts from the mach-*/mpp.c
files.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Tested-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Move custom orion platforms gpio code to orion-gpio to remove the
dependency on mach/gpio.h.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>

Patchset "ARM: orion: Refactor the MPP code common in the orion
platform" broke at least Orion5x based platforms. These platforms have
pins configured as GPIO when the selector is not 0x0. However the
common code assumes the selector is always 0x0 for a GPIO lines. It
then ignores the GPIO bits in the MPP definitions, resulting in that
Orion5x machines cannot correctly configure there GPIO lines.

The Fix removes the assumption that the selector is always 0x0.
In order that none GPIO configurations are correctly blocked,
Kirkwood and mv78xx0 MPP definitions are corrected to only set the
GPIO bits for GPIO configurations.

This third version, which does not contain any whitespace changes,
and is rebased on v3.3-rc2.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

mv78xx0 and kirkwood use identical mpp code.

It should also be possible to rewrite the orion5x mpp to use this
platform code.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

This patch makes the various mach dirs that use the plat-orion GPIO
code pass in GPIO-related platform info (GPIO controller base address,
secondary base IRQ number, etc) explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Wrong MPP configuration would cause <cpu>_mpp_conf loop infinitely
because the mpp list iterator would not be incremented.
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

This patch is composed of two new files :

- mpp.c which is mainly inspired by the same file as in mach-kirkwood

- mpp.h that is written from the documentation provided by Marvell
http://www.marvell.com/products/processors/embedded/discovery_innovation/HW_MV78100_OpenSource.pdf

Moreover, due to some implementation problem, I have
defined some MPPX_UNUSED that offer developers the possibility
to SET MPP to some unused value (such as for Buffalo WXL).

Note: This patch doesn't support MV78200 yet (only 78100 MPP lines have
been written)
Signed-off-by: NSebastien Requiem <sebastien@kolios.dk>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Signed-off-by: NErik Benada <erikbenada@yahoo.ca>

[ nico: fix locking, additional cleanups ]
Signed-off-by: NNicolas Pitre <nico@marvell.com>

This allows for board support code to set up their MPP config if the
bootloader didn't do it all or did it wrong.  This also allows to
register usable GPIOs.
Signed-off-by: NNicolas Pitre <nico@marvell.com>