- 01 11月, 2011 1 次提交
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由 Paul Bolle 提交于
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Acked-by: NDavid Rientjes <rientjes@google.com> Signed-off-by: NMichal Marek <mmarek@suse.cz>
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- 13 10月, 2011 1 次提交
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由 Yinghai Lu 提交于
Sparseirq got introduced in v2.6.28 and Thomas did a huge cleanup around v2.6.38 that eliminated basically all disadvantages of it. So we can remove non-sparseirq support now and simplify our IRQ degrees of freedom a bit. Suggested-and-acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NYinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/4E95E21D.6090200@oracle.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
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- 28 9月, 2011 1 次提交
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由 Paul Bolle 提交于
There are numerous broken references to Documentation files (in other Documentation files, in comments, etc.). These broken references are caused by typo's in the references, and by renames or removals of the Documentation files. Some broken references are simply odd. Fix these broken references, sometimes by dropping the irrelevant text they were part of. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 21 9月, 2011 2 次提交
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由 Ed Wildgoose 提交于
This new driver replaces the old PCEngines Alix 2/3 LED driver with a new driver that controls the LEDs through the leds-gpio driver. The old driver accessed GPIOs directly, which created a conflict and prevented also loading the cs5535-gpio driver to read other GPIOs on the Alix board. With this new driver, we hook into leds-gpio which in turn uses GPIO to control the LEDs and therefore it's possible to control both the LEDs and access onboard GPIOs Driver is moved to platform/geode as requested by Grant and any other geode initialisation modules should move here also This driver is inspired by leds-net5501.c by Alessandro Zummo. Ideally, leds-net5501.c should also be moved to platform/geode. Additionally the driver relies on parts of the patch: 7f131cf3 ("leds: leds-alix2c - take port address from MSR) by Daniel Mack to perform detection of the Alix board. [akpm@linux-foundation.org: include module.h] Signed-off-by: NEd Wildgoose <kernel@wildgooses.com> Cc: git@wildgooses.com Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Daniel Mack <daniel@caiaq.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Richard Purdie <rpurdie@rpsys.net> Reviewed-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Suresh Siddha 提交于
Change the CONFIG_DMAR to CONFIG_INTEL_IOMMU to be consistent with the other IOMMU options. Rename the CONFIG_INTR_REMAP to CONFIG_IRQ_REMAP to match the irq subsystem name. And define the CONFIG_DMAR_TABLE for the common ACPI DMAR routines shared by both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP. Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Cc: yinghai@kernel.org Cc: youquan.song@intel.com Cc: joerg.roedel@amd.com Cc: tony.luck@intel.com Cc: dwmw2@infradead.org Link: http://lkml.kernel.org/r/20110824001456.558630224@sbsiddha-desk.sc.intel.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
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- 08 9月, 2011 1 次提交
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由 Martin Schwidefsky 提交于
The automatic increase of the min_delta_ns of a clockevents device should be done in the clockevents code as the minimum delay is an attribute of the clockevents device. In addition not all architectures want the automatic adjustment, on a massively virtualized system it can happen that the programming of a clock event fails several times in a row because the virtual cpu has been rescheduled quickly enough. In that case the minimum delay will erroneously be increased with no way back. The new config symbol GENERIC_CLOCKEVENTS_MIN_ADJUST is used to enable the automatic adjustment. The config option is selected only for x86. Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com> Cc: john stultz <johnstul@us.ibm.com> Link: http://lkml.kernel.org/r/20110823133142.494157493@de.ibm.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 03 8月, 2011 1 次提交
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由 Huang Ying 提交于
cmpxchg() is widely used by lockless code, including NMI-safe lockless code. But on some architectures, the cmpxchg() implementation is not NMI-safe, on these architectures the lockless code may need a spin_trylock_irqsave() based implementation. This patch adds a Kconfig option: ARCH_HAVE_NMI_SAFE_CMPXCHG, so that NMI-safe lockless code can depend on it or provide different implementation according to it. On many architectures, cmpxchg is only NMI-safe for several specific operand sizes. So, ARCH_HAVE_NMI_SAFE_CMPXCHG define in this patch only guarantees cmpxchg is NMI-safe for sizeof(unsigned long). Signed-off-by: NHuang Ying <ying.huang@intel.com> Acked-by: NMike Frysinger <vapier@gentoo.org> Acked-by: NPaul Mundt <lethal@linux-sh.org> Acked-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Acked-by: NRichard Henderson <rth@twiddle.net> CC: Mikael Starvik <starvik@axis.com> Acked-by: NDavid Howells <dhowells@redhat.com> CC: Yoshinori Sato <ysato@users.sourceforge.jp> CC: Tony Luck <tony.luck@intel.com> CC: Hirokazu Takata <takata@linux-m32r.org> CC: Geert Uytterhoeven <geert@linux-m68k.org> CC: Michal Simek <monstr@monstr.eu> Acked-by: NRalf Baechle <ralf@linux-mips.org> CC: Kyle McMartin <kyle@mcmartin.ca> CC: Martin Schwidefsky <schwidefsky@de.ibm.com> CC: Chen Liqin <liqin.chen@sunplusct.com> CC: "David S. Miller" <davem@davemloft.net> CC: Ingo Molnar <mingo@redhat.com> CC: Chris Zankel <chris@zankel.net> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 01 8月, 2011 1 次提交
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由 H. Peter Anvin 提交于
Architectural inlines to get random ints and longs using the RDRAND instruction. Intel has introduced a new RDRAND instruction, a Digital Random Number Generator (DRNG), which is functionally an high bandwidth entropy source, cryptographic whitener, and integrity monitor all built into hardware. This enables RDRAND to be used directly, bypassing the kernel random number pool. For technical documentation, see: http://software.intel.com/en-us/articles/download-the-latest-bull-mountain-software-implementation-guide/ In this patch, this is *only* used for the nonblocking random number pool. RDRAND is a nonblocking source, similar to our /dev/urandom, and is therefore not a direct replacement for /dev/random. The architectural hooks presented in the previous patch only feed the kernel internal users, which only use the nonblocking pool, and so this is not a problem. Since this instruction is available in userspace, there is no reason to have a /dev/hw_rng device driver for the purpose of feeding rngd. This is especially so since RDRAND is a nonblocking source, and needs additional whitening and reduction (see the above technical documentation for details) in order to be of "pure entropy source" quality. The CONFIG_EXPERT compile-time option can be used to disable this use of RDRAND. Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com> Originally-by: NFenghua Yu <fenghua.yu@intel.com> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "Theodore Ts'o" <tytso@mit.edu>
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- 25 7月, 2011 1 次提交
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由 Daniel Drake 提交于
As reported by Randy Dunlap, CONFIG_POWER_SUPPLY=m caused a compile error: arch/x86/built-in.o: In function `battery_status_changed': olpc-xo15-sci.c:(.text+0x3acdd): undefined reference to `power_supply_get_by_name' olpc-xo15-sci.c:(.text+0x3ad04): undefined reference to `power_supply_changed' The SCI drivers, as bool, require POWER_SUPPLY to be builtin. Use select to make that a hard requirement and avoid this build failure. Reported-by: NRandy Dunlap <rdunlap@xenotime.net> Acked-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NDaniel Drake <dsd@laptop.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 22 7月, 2011 2 次提交
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由 Shaohua Li 提交于
Direct access is needed in mmconf mode too. There are two reasons: 1. we need it to access first 256 bytes. We have bug before that using mmconf to access pci config space hangs system (when resizing BARs), so we use type1 config for legacy config space. 2. when doing mmconfg bar checking, we need access ACPI _CRS, which might access PCI config space. Signed-off-by: NShaohua Li <shaohua.li@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 H. Peter Anvin 提交于
The machinery for __ARCH_HAS_CLOCKSOURCE_DATA assumed a file in asm-generic would be the default for architectures without their own file in asm/, but that is not how it works. Replace it with a Kconfig option instead. Link: http://lkml.kernel.org/r/4E288AA6.7090804@zytor.comSigned-off-by: NH. Peter Anvin <hpa@zytor.com> Cc: Andy Lutomirski <luto@mit.edu> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Tony Luck <tony.luck@intel.com>
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- 21 7月, 2011 1 次提交
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由 Alan Cox 提交于
We need to carve up the configuration between: - MID general - Moorestown specific - Medfield specific - Future devices As a base point create an INTEL_MID configuration property. We make the existing MRST configuration a sub-option. This means that the rest of the kernel config can still use X86_MRST checks without anything going backwards. After this is merged future patches will tidy up which devices are MID and which are X86_MRST, as well as add options for Medfield. Signed-off-by: NAlan Cox <alan@linux.intel.com> Link: http://lkml.kernel.org/r/20110712164859.7642.84136.stgit@bob.linux.org.ukSigned-off-by: NIngo Molnar <mingo@elte.hu>
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- 14 7月, 2011 1 次提交
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由 Glauber Costa 提交于
This patch makes update_rq_clock() aware of steal time. The mechanism of operation is not different from irq_time, and follows the same principles. This lives in a CONFIG option itself, and can be compiled out independently of the rest of steal time reporting. The effect of disabling it is that the scheduler will still report steal time (that cannot be disabled), but won't use this information for cpu power adjustments. Everytime update_rq_clock_task() is invoked, we query information about how much time was stolen since last call, and feed it into sched_rt_avg_update(). Although steal time reporting in account_process_tick() keeps track of the last time we read the steal clock, in prev_steal_time, this patch do it independently using another field, prev_steal_time_rq. This is because otherwise, information about time accounted in update_process_tick() would never reach us in update_rq_clock(). Signed-off-by: NGlauber Costa <glommer@redhat.com> Acked-by: NRik van Riel <riel@redhat.com> Acked-by: NPeter Zijlstra <peterz@infradead.org> Tested-by: NEric B Munson <emunson@mgebm.net> CC: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> CC: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 11 7月, 2011 2 次提交
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由 Tejun Heo 提交于
Commit 2706a0bf ("x86, NUMA: Enable CONFIG_AMD_NUMA on 32bit too") enabled AMD NUMA for 32bit too. Unfortunately, SPARSEMEM on 32bit had rather coarse (512MiB) addr->node mapping granularity due to lack of space in page->flags. This led to boot failure on certain AMD NUMA machines which had 128MiB alignment on nodes. Patches to properly detect this condition and reject NUMA configuration are posted[1] but deemed too pervasive for merge at this point (-rc6). Disable AMD NUMA for 32bit for now and re-enable once the detection logic is merged. [1] http://thread.gmane.org/gmane.linux.kernel/1161279/focus=1162583Reported-by: NHans Rosenfeld <hans.rosenfeld@amd.com> Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Conny Seidel <conny.seidel@amd.com> Link: http://lkml.kernel.org/r/20110711083432.GC943@htj.dyndns.orgSigned-off-by: NIngo Molnar <mingo@elte.hu>
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由 Michael Witten 提交于
Signed-off-by: NMichael Witten <mfwitten@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 07 7月, 2011 8 次提交
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由 Daniel Drake 提交于
Add a driver for the ACPI-based EC event interface found on the OLPC XO-1.5 laptop. This enables notification of battery/AC power events, and enables various devices to be used as wakeup sources through regular ACPI mechanisms. This driver can't be built as a module, because some drivers need to know at boot-time if SCI-based functionality is available via olpc_ec_wakeup_available(). Signed-off-by: NDaniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-12-git-send-email-dsd@laptop.orgAcked-by: NAndres Salomon <dilinger@queued.net> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Daniel Drake 提交于
Add a driver to configure the XO-1 RTC via CS5536 MSRs, to be used as a system wakeup source via olpc-xo1-pm. Device detection is based on finding the relevant device tree node. Signed-off-by: NDaniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-11-git-send-email-dsd@laptop.orgAcked-by: NAndres Salomon <dilinger@queued.net> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Reviewed-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Daniel Drake 提交于
EC events indicate change in AC power connectivity, battery state of charge, battery error, battery presence, etc. Send notifications to the power supply subsystem when changes are detected. Signed-off-by: NDaniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-10-git-send-email-dsd@laptop.orgAcked-by: NAndres Salomon <dilinger@queued.net> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Daniel Drake 提交于
Configure the XO-1's lid switch GPIO to trigger an SCI interrupt, and correctly expose this input device which can be used as a wakeup source. Signed-off-by: NDaniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-9-git-send-email-dsd@laptop.orgAcked-by: NAndres Salomon <dilinger@queued.net> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Daniel Drake 提交于
The EC in the OLPC XO-1 delivers GPE events to provide various notifications. Add the basic code for GPE/EC event processing and enable the ebook switch, which can be used as a wakeup source. Signed-off-by: NDaniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-8-git-send-email-dsd@laptop.orgAcked-by: NAndres Salomon <dilinger@queued.net> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Daniel Drake 提交于
The System Control Interrupt is used in the OLPC XO-1 to control various features of the laptop. Add the driver base and the power button functionality. This driver can't be built as a module, because functionality added in future patches means that some drivers need to know at boot-time whether SCI-based functionality is available. Signed-off-by: NDaniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-6-git-send-email-dsd@laptop.orgAcked-by: NAndres Salomon <dilinger@queued.net> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Daniel Drake 提交于
Add code needed for basic suspend/resume of the XO-1 laptop. Based on earlier work by Jordan Crouse, Andres Salomon, and others. This patch incorporates all earlier feedback from Thomas Gleixner. To clarify a certain point (now more obvious in the code itself): On resume, OpenFirmware returns execution to Linux in protected mode with a kernel-compatible GDT already set up. The changes and simplifications suggested have all been included. Signed-off-by: NDaniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-5-git-send-email-dsd@laptop.orgAcked-by: NAndres Salomon <dilinger@queued.net> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Daniel Drake 提交于
Based on earlier review comments, we'll no longer try to stick all of our XO-1 goodies in a single driver. We'll split it into a power management driver, and an EC/SCI driver. As a first step, rename olpc-xo1 to olpc-xo1-pm, and make it builtin instead of modular. Signed-off-by: NDaniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-4-git-send-email-dsd@laptop.orgAcked-by: NAndres Salomon <dilinger@queued.net> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 01 7月, 2011 1 次提交
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Stultz <john.stultz@linaro.org> Link: http://lkml.kernel.org/r/20110609130622.026152527@linutronix.de
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- 28 6月, 2011 1 次提交
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由 Jamie Iles 提交于
The APB timers are an IP block from Synopsys (DesignWare APB timers) and are also found in other systems including ARM SoC's. This patch adds functions for creating clock_event_devices and clocksources from APB timers but does not do the resource allocation. This is handled in a higher layer to allow the timers to be created from multiple methods such as platform_devices. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
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- 21 6月, 2011 2 次提交
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由 Ohad Ben-Cohen 提交于
This should ease finding similarities with different platforms, with the intention of solving problems once in a generic framework which everyone can use. Note: to move intel-iommu.c, the declaration of pci_find_upstream_pcie_bridge() has to move from drivers/pci/pci.h to include/linux/pci.h. This is handled in this patch, too. As suggested, also drop DMAR's EXPERIMENTAL tag while we're at it. Compile-tested on x86_64. Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Ohad Ben-Cohen 提交于
This should ease finding similarities with different platforms, with the intention of solving problems once in a generic framework which everyone can use. Compile-tested on x86_64. Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 14 6月, 2011 1 次提交
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由 Ohad Ben-Cohen 提交于
Create a dedicated folder for iommu drivers, and move the base iommu implementation over there. Grouping the various iommu drivers in a single location will help finding similar problems shared by different platforms, so they could be solved once, in the iommu framework, instead of solved differently (or duplicated) in each driver. Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 09 6月, 2011 2 次提交
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由 Ralf Baechle 提交于
Lenghty lists of the kind "depends on ARCH1 || ARCH2 ... || ARCH123" are usually either wrong or too coarse grained. Or plain an ugly sin. [ tglx: Fixed up amigaone ] Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Matt Turner <mattst88@gmail.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linux-alpha@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linuxppc-dev@lists.ozlabs.org Cc: Gerhard Pircher <gerhard_pircher@gmx.net> Link: http://lkml.kernel.org/r/20110601180610.984881988@duck.linux-mips.netSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Ralf Baechle 提交于
Move them to drivers/clocksource/i8253.c and remove the implementations in arch/ [ tglx: Avoid the extra file in lib - folded arch patches in. The export will become conditional in a later step ] Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Link: http://lkml.kernel.org/r/20110601180610.221426078@duck.linux-mips.net Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 27 5月, 2011 1 次提交
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由 Akinobu Mita 提交于
By the previous style change, CONFIG_GENERIC_FIND_NEXT_BIT, CONFIG_GENERIC_FIND_BIT_LE, and CONFIG_GENERIC_FIND_LAST_BIT are not used to test for existence of find bitops anymore. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Acked-by: NGreg Ungerer <gerg@uclinux.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 26 5月, 2011 1 次提交
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由 Jean Delvare 提交于
Let i8k create an hwmon class device so that libsensors will expose the CPU temperature and fan speeds to monitoring applications. Signed-off-by: NJean Delvare <khali@linux-fr.org> Acked-by: NGuenter Roeck <guenter.roeck@ericsson.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Massimo Dal Zotto <dz@debian.org>
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- 25 5月, 2011 1 次提交
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由 Roland Dreier 提交于
The presense of a writeq() implementation on 32-bit x86 that splits the 64-bit write into two 32-bit writes turns out to break the mpt2sas driver (and in general is risky for drivers as was discussed in <http://lkml.kernel.org/r/adaab6c1h7c.fsf@cisco.com>). To fix this, revert 2c5643b1 ("x86: provide readq()/writeq() on 32-bit too") and follow-on cleanups. This unfortunately leads to pushing non-atomic definitions of readq() and write() to various x86-only drivers that in the meantime started using the definitions in the x86 version of <asm/io.h>. However as discussed exhaustively, this is actually the right thing to do, because the right way to split a 64-bit transaction is hardware dependent and therefore belongs in the hardware driver (eg mpt2sas needs a spinlock to make sure no other accesses occur in between the two halves of the access). Build tested on 32- and 64-bit x86 allmodconfig. Link: http://lkml.kernel.org/r/x86-32-writeq-is-broken@mdm.bga.comAcked-by: NHitoshi Mitake <h.mitake@gmail.com> Cc: Kashyap Desai <Kashyap.Desai@lsi.com> Cc: Len Brown <lenb@kernel.org> Cc: Ravi Anand <ravi.anand@qlogic.com> Cc: Vikas Chaudhary <vikas.chaudhary@qlogic.com> Cc: Matthew Garrett <mjg@redhat.com> Cc: Jason Uhlenkott <juhlenko@akamai.com> Acked-by: NJames Bottomley <James.Bottomley@parallels.com> Acked-by: NIngo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: NRoland Dreier <roland@purestorage.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 20 5月, 2011 1 次提交
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由 Dave Jones 提交于
Signed-off-by: NDave Jones <davej@redhat.com>
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- 17 5月, 2011 1 次提交
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由 David Rientjes 提交于
ZONE_DMA is unnecessary for a large number of machines that do not require less than 32-bit DMA addressing, e.g. ISA legacy DMA or PCI cards with a restricted DMA address mask. This patch allows users to disable ZONE_DMA for x86 if they know they will not be using such devices with their kernel. This prevents the VM from unnecessarily reserving a ratio of memory (defaulting to 1/256th of system capacity) with lowmem_reserve_ratio for such allocations when it will never be used. Signed-off-by: NDavid Rientjes <rientjes@google.com> Link: http://lkml.kernel.org/r/alpine.DEB.2.00.1105161353560.4353@chino.kir.corp.google.comSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 14 5月, 2011 1 次提交
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由 Russell King 提交于
Convert x86 i8253 clocksource code to use generic i8253 clocksource. Acked-by: NJohn Stultz <john.stultz@linaro.org> Acked-by: NThomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 5月, 2011 1 次提交
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由 Rafael J. Wysocki 提交于
Since suspend, resume and shutdown operations in struct sysdev_class and struct sysdev_driver are not used any more, remove them. Also drop sysdev_suspend(), sysdev_resume() and sysdev_shutdown() used for executing those operations and modify all of their users accordingly. This reduces kernel code size quite a bit and reduces its complexity. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 05 5月, 2011 1 次提交
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由 Randy Dunlap 提交于
Fix kconfig unmet dependency warning: HAVE_BPF_JIT depends on NET, so make the "select" of it depend on NET also. warning: (X86) selects HAVE_BPF_JIT which has unmet direct dependencies (NET) Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 5月, 2011 2 次提交
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由 Tejun Heo 提交于
Now that NUMA init path is unified, NUMA emulation can be enabled on 32bit. Make numa_emluation.c safe on 32bit by doing the followings. * Define MAX_DMA32_PFN on 32bit too. * Include bootmem.h for max_pfn declaration. * Use u64 explicitly and always use PFN_PHYS() when converting page number to address. * Avoid __udivdi3() generation on 32bit by doing number of pages calculation instead in split_nodes_interleave(). And drop X86_64 dependency from Kconfig. Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: David Rientjes <rientjes@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com>
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由 Tejun Heo 提交于
Now that NUMA init path is unified, amdtopology can be enabled on 32bit. Make amdtopology.c safe on 32bit by explicitly using u64 and drop X86_64 dependency from Kconfig. Inclusion of bootmem.h is added for max_pfn declaration. Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: David Rientjes <rientjes@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com>
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