1. 25 7月, 2012 1 次提交
  2. 23 7月, 2012 1 次提交
    • K
      MIPS: Add CPU support for Loongson1B · 2fa36399
      Kelvin Cheung 提交于
      Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology
      (ICT) and the Chinese Academy of Sciences (CAS), which implements the
      MIPS32 release 2 instruction set.
      
      [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device
      which also is why it identifies itself with the Legacy Vendor ID in the
      PrID register.  When applying the patch I shoveled some code around to
      keep things in alphabetical order and avoid forward declarations.]
      Signed-off-by: NKelvin Cheung <keguang.zhang@gmail.com>
      Cc: To: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Cc: wuzhangjin@gmail.com
      Cc: zhzhl555@gmail.com
      Cc: Kelvin Cheung <keguang.zhang@gmail.com>
      Patchwork: https://patchwork.linux-mips.org/patch/3976/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      2fa36399
  3. 19 7月, 2012 29 次提交
  4. 18 7月, 2012 9 次提交