Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio
request/free.
Signed-off-by: NCharulatha V <charu@ti.com>
Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making
non_wakeup_gpios as part of pdata.
Signed-off-by: NCharulatha V <charu@ti.com>
Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions
to handle save context & restore context respectively in the OMAP GPIO driver
itself instead of calling these functions from pm specific files.
For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in
gpio_resume_after_idle() call it again. If the count is different, do restore
context.
Signed-off-by: NCharulatha V <charu@ti.com>
Signed-off-by: NTarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Currently gpio_context array used to save gpio bank's context, is used only for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it
can be specific to each gpio bank and can be used for any OMAP architecture
Signed-off-by: NCharulatha V <charu@ti.com>
Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1
is in wakeup domain. Instead of identifying bank's power domain by bank id,
use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context()
during dev_init.

For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used.
omap_device_get_pwrdm() could not be used as the pwrdm information needs to be
filled in pdata, whereas omap_device_get_pwrdm() could be used only after
omap_device_build() call.
Signed-off-by: NCharulatha V <charu@ti.com>
Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this
dependency from the driver by using list. Also remove the dependency on array of
pointers to gpio_bank struct of all GPIO devices.
Signed-off-by: NCharulatha V <charu@ti.com>
Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

With commit f64ad1a0, "gpio/omap: cleanup _set_gpio_wakeup(), remove
ifdefs", access to build time conditionally omitted 'suspend_wakeup'
member of the 'gpio_bank' structure has been placed unconditionally in
function _set_gpio_wakeup(), which is always built. This resulted in the
driver compilation broken for certain OMAP1, i.e., non-OMAP16xx,
configurations.

Really required or not in previously excluded cases, define this
structure member unconditionally as a fix.

Tested with a custom OMAP1510 only configuration.
Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: NKevin Hilman <khilman@ti.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Ensure return value of irq_alloc_generic_chip() is checked before continuing
on to use it.
Signed-off-by: NTodd Poynor <toddpoynor@google.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

This macro is ugly and confusing, especially since it passes in most
arguments, but uses an implied 'base' from the caller.

Replace it with an equivalent static inline.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Remove cpu_is_* checks from gpio_show_revision() by passing in the
revision address offset from platform data.  SoCs with no revision
register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to
signify no register.

While here, all GPIO banks are assumed to be the same revision, so fix
show_revision() to only show the revision for the first bank it finds.
This removes duplicate GPIO revision prints during boot.

Thanks to Charulatha V <charu@ti.com> for finding/fixing a few -1s
that were missed in the original patch.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Use register offsets passed in from pdata for accessing debounce registers.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Make _set_gpio_wakeup() generic by removing ifdefs.  Code for the
various SoCs/bank-methods was already the same, except for the
non-wakeup GPIO checking.  But that flag is set on a per-SoC basis, so
can be used for all SoCs.

While here, use dev_err() and remove GPIO bank calculation assumption
based on subtracting bank pointers.
Signed-off-by: NKevin Hilman <khilman@ti.com>

These functions are useless.  They are only called in a few places,
and where they are called, the GPIO has already been converted from an
IRQ or masked, so these functions will never fail.
Signed-off-by: NKevin Hilman <khilman@ti.com>

MPUIO banks have their own dedicated IRQ chip interface, separate from
the "normal" GPIO banks.   Convert the MPUIO IRQ chip over to using
the new generic IRQ chip interface.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Cleanup GPIO IRQ enable/disable handling by removing SoC-specific

Also split enable/disable IRQ into separate functions for better
readability and also facilitate potentially moving to generic irq_chip
in the future.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Cleanup IRQ status handling by passing IRQ status register offsets
via platform data.

Cleans up clearing of GPIO IRQ status and GPIO ISR handler.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add register offset fields to GPIO platform_data for registers.

This patch adds registers that control direction, input and output
data.  Using these register offsets in the common driver allows
removal of #ifdefs and greatly improves readability.

Also create dedicated data out functions: one for banks with dedicated
set/clear registers, and another for banks with a single mask
register.
Signed-off-by: NKevin Hilman <khilman@ti.com>

use chip info to get the pointer to the struct gpio_bank for a
given GPIO bank and remove get_gpio_bank().
Signed-off-by: NCharulatha V <charu@ti.com>

The get_gpio_index() function, littered with cpu_is_* checks can be easily
replaced by using bitops based on the GPIO bank width.  Do so.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Replace hard-coded mask values with bank->width which is already coming
from platform_data.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Rather than having a file-global bank_width variable, move it into
struct gpio_bank so it can be bank-specific.   Note the bank width
is already passed per-bank via platform_data, so current code would
be incorrect if any banks had different width.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Remove the OMAP1 #ifdef and MPUIO special case for _clear_gpio_irqbank()

The MPUIOs do not need a register access to ack/clear the IRQ status,
since reading the IRQ status clears it.  In addition, the MPUIO
irq_chip has an empty ack method, so _clear_gpio_irqbank() is never
used for MPUIOs.
Signed-off-by: NKevin Hilman <khilman@ti.com>

In commit 78a1a6d3 (ARM: OMAP4: Update
the GPIO support) braces were mistakenly added to included the
register read-back inside the cpu_is_* checking.

Remove the braces, ensuring that a register read-back is done, even
when the IRQSTATUS2 register is not written.

Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2
depending on the CPU, but a read-back of any register in that region
will cause a flush of the posted writes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

If gpio pins from bank[2-5] are marked as wakeup enable and if the wake is
through gpio IO pad wakeup, then that wakeup gpio interrupt is lost.

In the current implementation, GPIO driver stores the context of DATAIN of
all the gpio in the bank. During GPIO resuming, it checks DATAIN with wakeup
enabled pins of gpio bank. If there is status change, then manually toggle
GPIO_LEVELDETECT to generate pseudo interrupt.
Reported-by: NPhilippe Mazet <p-mazet@ti.com>
Tested-by: NPhilippe Mazet <p-mazet@ti.com>
Signed-off-by: NAmbresh K <ambresh@ti.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

_set_gpio_triggering uses read-modify-write on bank registers,
lock bank->lock around all calls to it to prevent register
corruption if two cpus access gpios in the same bank at the
same time.
Signed-off-by: NColin Cross <ccross@android.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Setting the IRQWAKEN bit was overwriting previous IRQWAKEN bits,
causing only the last bit set to take effect, resulting in lost
wakeups when the GPIO controller is in idle.

Replace direct writes to IRQWAKEN with MOD_REG_BIT calls to
perform a read-modify-write on the register.
Signed-off-by: NColin Cross <ccross@android.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

WARNING: arch/arm/plat-omap/built-in.o(.devinit.text+0x46c): Section mismatch in reference from the function omap_gpio_probe() to the function .init.text:omap_gpio_chip_init()
The function __devinit omap_gpio_probe() references
a function __init omap_gpio_chip_init().
If omap_gpio_chip_init is only used by omap_gpio_probe then
annotate omap_gpio_chip_init with a matching annotation.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Move OMAP GPIO driver to drivers/gpio.  Builds whenever
CONFIG_ARCH_OMAP=y.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Register offset defines are moved to <plat/gpio.h> so they can be used
by SoC-specific device init code to fill out platform_data register
offsets.
Signed-off-by: NKevin Hilman <khilman@ti.com>

This patch updates the OMAP gpio chained IRQ handler to use the chained
IRQ enter/exit functions in order to function correctly on primary
controllers with different methods of flow control.

Cc: Colin Cross <ccross@google.com>
Cc: Tony Lindgren <tony@atomide.com>
Tested-and-acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Replace the sysdev class and struct sys_device used for power
management in the OMAP's GPIO code with a struct syscore_ops object
which is simpler.
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NKevin Hilman <khilman@ti.com>
Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>

Convert to the new function names. Automated with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

1) Core code stores the flow type already
2) Flow type is accessible in irq_data
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Remove the open coded access to irq_desc which will fail on sparse irq
and use the proper wrappers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>

Instead of accessing the irq_desc array directly
we can use irq_to_desc(irq). That will allow us to,
if wanted, select SPARSE_IRQ and irq_descs will be
added to a radix tree, instead of a array.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

In case on OMAP2+ we call set_24xx_gpio_triggering() instead of
updating reg and l values. However, at the end of the function we
perform a write:

	__raw_writel(l, reg);

So on OMAP2+ we end up writing 0 to the bank->base which is not
correct (typically this points to GPIO_REVISION register).

Fix this by returning immediately after call to
set_24xx_gpio_triggering().
Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The OMAP powerdomain code and data is all OMAP2+-specific.  This seems
unlikely to change any time soon.  Move plat-omap/include/plat/powerdomain.h
to mach-omap2/powerdomain.h.  The primary point of doing this is to remove
the temptation for unrelated upper-layer code to access powerdomain code
and data directly.

As part of this process, remove the references to powerdomain data
from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap.
Change the DSPBridge code to point to the new location for the
powerdomain headers.  The DSPBridge code should not be including the
powerdomain headers; these should be removed.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>

We need to divide the 15xx/16xx offset by 2 for 7xx. Use bank->stride
for that. This allows us to get rid of the duplicate defines for the
MPUIO registers.

Note that this will cause omap-keypad.c driver to not work on 7xx.
However, the right fix there is to move over to matrix_keypad instead
as suggested by Cory Maccarrone <darkstar6262@gmail.com> and
Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>.

Cc: Cory Maccarrone <darkstar6262@gmail.com>
Acked-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: NTony Lindgren <tony@atomide.com>