This patch adds 'flash' and 'num_flash' attributes to the platform data.
There was added code in the driver to iterate across these attributes in the
detect-flash routine.  This is done similarly to the existing method
which uses a 'builtin_flash_types' field.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch moves the exported datastructures from the pxa3xx_nand.c driver
into the <mach/pxa3xx_nand.h> header. This is a plain movement without
any modification of the attributes.

This is the first one of a set of patches which:

 * allows to specify used NAND flash in the platform code and allows to turn
   off the old way to specify NAND characteristics in the driver.  This way did
   not worked well as these characteristics depend on the platform and can not be
   derived from NAND id alone.

   E.g.  some NAND chips share the same ID (e.g.  K9K8G08U0A and K9NBG08U5A) but
   have different timings (which are written in the common driver currently and
   must be modified there).

 * adds 'const' annotations at various places

Further patches will be sent to the mtd-list.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NSemun Lee <semun.lee@samsung.com>
Acked-by: NEric Miao <eric.miao@marvell.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Support 512 byte ECC calculation

[FM: updated two comments]
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NFrans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

It doesn't use LINUX_VERSION_CODE nor KERNEL_VERSION.

This patch removes the said #include <version.h>.
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch lets the files using linux/version.h match the files that
#include it.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

[Reported by Randy Dunlap]
Signed-off-by: NAlexey Korolev <akorolev@infradead.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch for nand_ecc.c fixes three issues

- fix code so it also works on big endian architectures
- added a printk in case of an uncorrectable ecc error
- strengthen the test for correctable errors (decreasing the chance
  that multiple bit faults by accident will be seen as correctable)

Note: the big endian code is only tested in a testbed (running on big endian
hardware) as I cannot rebuild and test a big endian kernel at the moment.
However the only thing that can go wrong is if <asm/byteorder.h> does not
give __BIG_ENDIAN in that case. In my eyes very unlikely.
Signed-off-by: NFrans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Make the standalone stuff a little cleaner, fix some checkpatch warnings.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch improves the performance of the ecc generation code by a 
factor of 18 on an INTEL D920 CPU, a factor of 7 on MIPS and a factor of 5 
on ARM (NSLU2)
Signed-off-by: NFrans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Removed duplicated include <asm/div64.h> in
drivers/mtd/nand/nandsim.c.
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The TMIO chips are only found (and thus tested) on ARM machines.
Moreover, we don't want the TMIO cells to be built if one of the TMIO
driver is not selected (which indirectly make the TMIO cells drivers
depend on ARM as well).
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

This patch adds support for the NAND controller commonly found in
TMIO based MFDs.
Signed-off-by: NIan Molton <spyro@f2s.com>
Acked-By: NDavid Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

This patch performs the equivalent include directory shuffle for
plat-orion, and fixes up all users.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Remove includes of asm/hardware.h in addition to asm/arch/hardware.h.
Then, since asm/hardware.h only exists to include asm/arch/hardware.h,
update everything to directly include asm/arch/hardware.h and remove
asm/hardware.h.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This was a reference board for which support never got merged upstream.
Kill it off, at rmk's suggestion.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NBryan Wu <cooloney@kernel.org>
Cc: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

[MTD] [NAND] Blackfin NFC Driver: fix bug - hw ecc calc by making sure we extract 11 bits from each register instead of 10
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

[MTD] [NAND] Blackfin NFC Driver: fix bug - do not clobber the status from the first 256 bytes if operating on 512 pages
Singed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

drivers/mtd/nand/nandsim.c: In function 'divide':
drivers/mtd/nand/nandsim.c:462: error: implicit declaration of function 'do_div'

Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

drivers/mtd/nand/fsl_elbc_nand.c:890: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'resource_size_t'
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Commit 3d459559 ("subpage read feature
as a way to improve performance") broke nandsim because nandsim does not
support the "random page read" NAND command. This patch adds
corresponding support.
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch enables NAND subpage read functionality.
If upper layer drivers are requesting to read non page aligned data NAND
subpage-read functionality reads the only whose ECC regions which include
requested data when original code reads whole page.
This significantly improves performance in many cases.

Here are some digits :

UBI volume mount time
No subpage reads: 5.75 seconds
Subpage read patch: 2.42 seconds

Open/stat time for files on JFFS2 volume:
No subpage read  0m 5.36s
Subpage read     0m 2.88s

Signed-off-by Alexey Korolev <akorolev@infradead.org>
Acked-by: NArtem Bityutskiy <dedekind@infradead.org>
Acked-by: NJörn Engel <joern@logfs.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add support for CPU frequency scalling to the S3C24XX NAND driver.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Remove unused variable from au1550 NAND driver.
Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

With CONFIG_MTD_OF_PARTS=y I'm getting this new section mismatch in reference
from the function fsl_elbc_chip_probe() to the function
.devinit.text:of_mtd_parse_partitions()

This patch fixes the mismatch by providing __devinit annotation to the
fsl_elbc_chip_probe() function.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-By: NScott Wood <scottwood@freescale.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Such a hardcoded address can cause a checkstop or machine check if
the driver is in the kernel but the address is not acknowledged.

Both drivers allow an address to be specified as either a module
parameter or config option.   Any future powerpc board should either
use one of these methods or find the address in the device tree.
Signed-off-by: NMilton Miller <miltonm@bga.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.

Also remove mtd->ecclayout and mtd->oobavail assignments, mtd core
handles this all by itself.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.

Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.

But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.

This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:

  OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.

To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

There's no reason to prevent the Atmel NAND driver from
building as a module.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: NAndrew Victor <linux@maxim.org.za>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The ALE signal isn't correctly wired up to the ECC controller on the
AP7000, so it starts calculating ECC during the address cycles.

Work around this by resetting the ECC controller between the address and
data cycles.
Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: NAndrew Victor <linux@maxim.org.za>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>