- 18 7月, 2014 23 次提交
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由 Shawn Guo 提交于
The only code left in mm-imx5.c is to create static mapping. While all IMX platform code are moved to use dynamic mapping, the file can just be removed now. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
These imx5 init_early[late] hooks are called only from mach-imx5x.c. Let's move them into mach-imx5x.c. While at it, replace the static mapping in imx51_ipu_mipi_setup() with dynamic mapping. Also this function and imx_src_init() do not necessarily to be called at .init_early hook, so move them into .init_machine. The mxc_iomux_v3_init() is dropped from imx51_init_early() in the moving, since it's only needed by non-DT boot. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
The imx5 pm code uses static mapping to access Cortex and GPC registers. The patch create struct imx5_pm_data to encode physical address of Cortex and GPC block, and create dynamic mapping for them at run-time. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
The imx5 pm code needs to access CCM registers. Let's remove the use of CCM static mapping in pm code by reusing the dynamic mapping created in clock code. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Replace the static mapping of DPLL block with dynamic mapping by calling ioremap(). Ideally, this should be done by calling of_iomap(), so that the physical address of DPLL can also be retrieved from device tree. But unfortunately, DPLL blocks are not defined in DT in the first place. So to maintain the compatibility of existing DTB, we use ioremap() with physical address defines in the code. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Replace the static mapping of CCM block with dynamic mapping and retrieve CCM base address from device tree. Though it's not nice to encode the variable ccm_base in macros, it helps to avoid a massive churn on the code. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Most of the macros in crm-regs-imx5.h are used nowhere. Let's move the needed ones into the C files, and remove the header. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Instead of using static define and mapping, the patch changes imx5 code that reads chip revision from IIM to retrieve base address from device tree and use dynamic mapping. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Since i.MX51 supports DT only, it's more appropriate to call mxc_timer_init_dt() than mxc_timer_init() to initialize timer. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
The function imx51_soc_init() was used by non-DT boot only. Since i.MX51 supports DT only, the function can be removed now. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
After i.MX51 supports DT only, tzic_init_irq() can figure out the tzic_base on its own. Thus, it can directly be .init_irq hook, and mx51[53]_init_irq() can be saved. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
The function mx5_clocks_common_init() was created with a number of arguments to pass oscillator clock rate in non-DT boot. Since i.MX5 is DT only platform, the arguments can be dropped, and the clock rate can just be retrieved from device tree. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Since i.MX51 becomes a DT only platform, we can make mx51_clocks_init() a DT call and save function mx51_clocks_init_dt() now. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
i.MX5 is DT only platforms, so these non-DT device registration helpers is used nowhere. Remove them. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Since i.MX51 becomes a DT only platform, those non-DT support files can be removed now. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Since i.MX51 becomes DT only now, we can drop option MACH_IMX51_DT and just use SOC_IMX51 instead. While at it, rename imx51-dt.c to mach-imx51.c to align with the name schema of other IMX DT only platforms. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
After moving SOC_IMX51 support over to device tree, all i.MX5 support becomes device tree only now. So options SOC_IMX5 and SOC_IMX51 can just be under 'Device tree only'. While at it, 'select ARCH_MXC_IOMUX_V3' is dropped, since it's only needed by non-DT build before. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
The platform_data header usb-ehci-mxc.h has a lot of stuff used by only IMX platform code. They shouldn't be really in this header but a IMX platform local header. Create ehci.h and move these stuff into it. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
imx_udc driver was removed from the kernel of about 10 months ago. This patch removes a registration helper for this driver and orphaned driver header. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Paul Bolle 提交于
None of the defines "for modules using static and dynamic DMA channels" are used. Remove these. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
No reason to choose a symbol HAVE_IMX_SRC separately for each supported i.MX5 CPU, this patch selects this symbol globally for i.MX5. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Lucas Stach 提交于
The i.MX6 reference manual doesn't make a clear distinction between the fixed clock divider and the enable gate for the pcie and sata reference clocks. This lead to the lvds mux inputs in the imx6q clk driver to be parented from the ref clock (which is the divider) instead of the actual gate, which in turn prevents the upstream clock to actually be enabled when lvds clk out is active. This fixes a hard machine hang regression in kernel 3.16 for boards where only pcie is active but no sata, as with this kernel version the imx6-pcie driver is no longer enabling the upstream clock directly but only lvds clk out. Reported-by: NArne Ruhnau <arne.ruhnau@target-sg.com> Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Tested-by: NArne Ruhnau <arne.ruhnau@target-sg.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 19 6月, 2014 1 次提交
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由 Russell King 提交于
A number of configurations spit out warnings similar to: warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_588369 which has unmet direct dependencies (CACHE_L2X0) warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_727915 which has unmet direct dependencies (CACHE_L2X0) Clean up the dependencies here: * PL310 symbols should only be selected when CACHE_L2X0 is enabled. * Since the cache-l2x0 code detects PL310 presence at runtime, and we will eventually get rid of CACHE_PL310, surround these errata options with an if CACHE_L2X0 conditional rather than repeating the dependency against each. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 6月, 2014 3 次提交
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由 Rob Herring 提交于
The System Type menu is getting quite long with platforms and is inconsistent in handling of sub-arch specific options. Tidy up the menu by making platform options a menuconfig entry containing any platform specific config items. [arnd: change OMAP part according to suggestion from Tony Lindgren <tony@atomide.com>] Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Stephen Boyd 提交于
This config exists entirely to hide the cpufreq menu from the kernel configuration unless a platform has selected it. Nothing is actually built if this config is 'Y' and it just leads to more patches that add a select under a platform Kconfig so that some other CPUfreq option can be chosen. Let's remove the option so that we can always enable CPUfreq drivers on ARM platforms. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Fugang Duan 提交于
There's a enet clock gate missing in clock tree, thus add it. Signed-off-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 30 5月, 2014 5 次提交
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由 Russell King 提交于
Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. Since the .init_irq method only calls irqchip_init(), we can remove that too as the generic code will take care of that. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Now that we handle this in core code, we don't need platforms enabling the low power modes directly. Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
We have a mixture of different devices with different register layouts, but we group all the bits together in an opaque mess. Split them out into those which are L2C-310 specific and ones which refer to earlier devices. Provide full auxiliary control register definitions. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
When targetting ARCH_MULTIPLATFORM, we may include support for SoCs with PCI-capable devices (e.g. mach-virt with virtio-pci). This patch allows PCI support to be selected for these SoCs by selecting CONFIG_MIGHT_HAVE_PCI when CONFIG_ARCH_MULTIPLATFORM=y and removes the individual selections from multi-platform enabled SoCs. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 22 5月, 2014 2 次提交
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由 Russell King 提交于
They're u32, they're not unsigned long. The UL suffix is not required here. Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Emil Goode 提交于
If we fail to allocate struct platform_device pdev we dereference it after the goto label err. This bug was found using coccinelle. Fixes: afa77ef3 (ARM: mx3: dynamically allocate "ipu-core" devices) Signed-off-by: NEmil Goode <emilgoode@gmail.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: <stable@vger.kernel.org> Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 21 5月, 2014 1 次提交
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由 Rob Herring 提交于
Adding function type checking to CLK_OF_DECLARE found a type mismatch with mx35_clocks_init_dt. The function should return void. Signed-off-by: NRob Herring <robh@kernel.org> Acked-by: NShawn Guo <shawn.guo@freescale.com> Cc: Sascha Hauer <kernel@pengutronix.de>
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- 16 5月, 2014 5 次提交
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由 Fabio Estevam 提交于
CLKO support is a clock output on mx25 which can output many of the internal clock sources. It is useful for debugging purpose or also for driving the audio codec for example. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
This patch removes clk_register_clkdev() for the clocks that do not have any users from boards and drivers. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
This patch adds missing clocks for mpll_gate, spll_gate, uart3_gate, ssi2_gate and brom_gate. As an additional this fixes incorrect bit position for dma_gate clock. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Add basic suppport for i.MX6 SoloX SoC. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Anson Huang 提交于
Add clock driver for i.MX6 SoloX SoC. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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