1. 17 7月, 2015 18 次提交
    • M
      crypto: poly1305 - Add a SSE2 SIMD variant for x86_64 · c70f4abe
      Martin Willi 提交于
      Implements an x86_64 assembler driver for the Poly1305 authenticator. This
      single block variant holds the 130-bit integer in 5 32-bit words, but uses
      SSE to do two multiplications/additions in parallel.
      
      When calling updates with small blocks, the overhead for kernel_fpu_begin/
      kernel_fpu_end() negates the perfmance gain. We therefore use the
      poly1305-generic fallback for small updates.
      
      For large messages, throughput increases by ~5-10% compared to
      poly1305-generic:
      
      testing speed of poly1305 (poly1305-generic)
      test  0 (   96 byte blocks,   16 bytes per update,   6 updates): 4080026 opers/sec,  391682496 bytes/sec
      test  1 (   96 byte blocks,   32 bytes per update,   3 updates): 6221094 opers/sec,  597225024 bytes/sec
      test  2 (   96 byte blocks,   96 bytes per update,   1 updates): 9609750 opers/sec,  922536057 bytes/sec
      test  3 (  288 byte blocks,   16 bytes per update,  18 updates): 1459379 opers/sec,  420301267 bytes/sec
      test  4 (  288 byte blocks,   32 bytes per update,   9 updates): 2115179 opers/sec,  609171609 bytes/sec
      test  5 (  288 byte blocks,  288 bytes per update,   1 updates): 3729874 opers/sec, 1074203856 bytes/sec
      test  6 ( 1056 byte blocks,   32 bytes per update,  33 updates):  593000 opers/sec,  626208000 bytes/sec
      test  7 ( 1056 byte blocks, 1056 bytes per update,   1 updates): 1081536 opers/sec, 1142102332 bytes/sec
      test  8 ( 2080 byte blocks,   32 bytes per update,  65 updates):  302077 opers/sec,  628320576 bytes/sec
      test  9 ( 2080 byte blocks, 2080 bytes per update,   1 updates):  554384 opers/sec, 1153120176 bytes/sec
      test 10 ( 4128 byte blocks, 4128 bytes per update,   1 updates):  278715 opers/sec, 1150536345 bytes/sec
      test 11 ( 8224 byte blocks, 8224 bytes per update,   1 updates):  140202 opers/sec, 1153022070 bytes/sec
      
      testing speed of poly1305 (poly1305-simd)
      test  0 (   96 byte blocks,   16 bytes per update,   6 updates): 3790063 opers/sec,  363846076 bytes/sec
      test  1 (   96 byte blocks,   32 bytes per update,   3 updates): 5913378 opers/sec,  567684355 bytes/sec
      test  2 (   96 byte blocks,   96 bytes per update,   1 updates): 9352574 opers/sec,  897847104 bytes/sec
      test  3 (  288 byte blocks,   16 bytes per update,  18 updates): 1362145 opers/sec,  392297990 bytes/sec
      test  4 (  288 byte blocks,   32 bytes per update,   9 updates): 2007075 opers/sec,  578037628 bytes/sec
      test  5 (  288 byte blocks,  288 bytes per update,   1 updates): 3709811 opers/sec, 1068425798 bytes/sec
      test  6 ( 1056 byte blocks,   32 bytes per update,  33 updates):  566272 opers/sec,  597984182 bytes/sec
      test  7 ( 1056 byte blocks, 1056 bytes per update,   1 updates): 1111657 opers/sec, 1173910108 bytes/sec
      test  8 ( 2080 byte blocks,   32 bytes per update,  65 updates):  288857 opers/sec,  600823808 bytes/sec
      test  9 ( 2080 byte blocks, 2080 bytes per update,   1 updates):  590746 opers/sec, 1228751888 bytes/sec
      test 10 ( 4128 byte blocks, 4128 bytes per update,   1 updates):  301825 opers/sec, 1245936902 bytes/sec
      test 11 ( 8224 byte blocks, 8224 bytes per update,   1 updates):  153075 opers/sec, 1258896201 bytes/sec
      
      Benchmark results from a Core i5-4670T.
      Signed-off-by: NMartin Willi <martin@strongswan.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      c70f4abe
    • M
      crypto: poly1305 - Export common Poly1305 helpers · 2546f811
      Martin Willi 提交于
      As architecture specific drivers need a software fallback, export Poly1305
      init/update/final functions together with some helpers in a header file.
      Signed-off-by: NMartin Willi <martin@strongswan.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      2546f811
    • M
      crypto: testmgr - Add a longer ChaCha20 test vector · 6692cbc2
      Martin Willi 提交于
      The AVX2 variant of ChaCha20 is used only for messages with >= 512 bytes
      length. With the existing test vectors, the implementation could not be
      tested. Due that lack of such a long official test vector, this one is
      self-generated using chacha20-generic.
      Signed-off-by: NMartin Willi <martin@strongswan.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      6692cbc2
    • M
      crypto: chacha20 - Add an eight block AVX2 variant for x86_64 · 3d1e93cd
      Martin Willi 提交于
      Extends the x86_64 ChaCha20 implementation by a function processing eight
      ChaCha20 blocks in parallel using AVX2.
      
      For large messages, throughput increases by ~55-70% compared to four block
      SSSE3:
      
      testing speed of chacha20 (chacha20-simd) encryption
      test 0 (256 bit key, 16 byte blocks): 42249230 operations in 10 seconds (675987680 bytes)
      test 1 (256 bit key, 64 byte blocks): 46441641 operations in 10 seconds (2972265024 bytes)
      test 2 (256 bit key, 256 byte blocks): 33028112 operations in 10 seconds (8455196672 bytes)
      test 3 (256 bit key, 1024 byte blocks): 11568759 operations in 10 seconds (11846409216 bytes)
      test 4 (256 bit key, 8192 byte blocks): 1448761 operations in 10 seconds (11868250112 bytes)
      
      testing speed of chacha20 (chacha20-simd) encryption
      test 0 (256 bit key, 16 byte blocks): 41999675 operations in 10 seconds (671994800 bytes)
      test 1 (256 bit key, 64 byte blocks): 45805908 operations in 10 seconds (2931578112 bytes)
      test 2 (256 bit key, 256 byte blocks): 32814947 operations in 10 seconds (8400626432 bytes)
      test 3 (256 bit key, 1024 byte blocks): 19777167 operations in 10 seconds (20251819008 bytes)
      test 4 (256 bit key, 8192 byte blocks): 2279321 operations in 10 seconds (18672197632 bytes)
      
      Benchmark results from a Core i5-4670T.
      Signed-off-by: NMartin Willi <martin@strongswan.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      3d1e93cd
    • M
      crypto: chacha20 - Add a four block SSSE3 variant for x86_64 · 274f938e
      Martin Willi 提交于
      Extends the x86_64 SSSE3 ChaCha20 implementation by a function processing
      four ChaCha20 blocks in parallel. This avoids the word shuffling needed
      in the single block variant, further increasing throughput.
      
      For large messages, throughput increases by ~110% compared to single block
      SSSE3:
      
      testing speed of chacha20 (chacha20-simd) encryption
      test 0 (256 bit key, 16 byte blocks): 43141886 operations in 10 seconds (690270176 bytes)
      test 1 (256 bit key, 64 byte blocks): 46845874 operations in 10 seconds (2998135936 bytes)
      test 2 (256 bit key, 256 byte blocks): 18458512 operations in 10 seconds (4725379072 bytes)
      test 3 (256 bit key, 1024 byte blocks): 5360533 operations in 10 seconds (5489185792 bytes)
      test 4 (256 bit key, 8192 byte blocks): 692846 operations in 10 seconds (5675794432 bytes)
      
      testing speed of chacha20 (chacha20-simd) encryption
      test 0 (256 bit key, 16 byte blocks): 42249230 operations in 10 seconds (675987680 bytes)
      test 1 (256 bit key, 64 byte blocks): 46441641 operations in 10 seconds (2972265024 bytes)
      test 2 (256 bit key, 256 byte blocks): 33028112 operations in 10 seconds (8455196672 bytes)
      test 3 (256 bit key, 1024 byte blocks): 11568759 operations in 10 seconds (11846409216 bytes)
      test 4 (256 bit key, 8192 byte blocks): 1448761 operations in 10 seconds (11868250112 bytes)
      
      Benchmark results from a Core i5-4670T.
      Signed-off-by: NMartin Willi <martin@strongswan.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      274f938e
    • M
      crypto: chacha20 - Add a SSSE3 SIMD variant for x86_64 · c9320b6d
      Martin Willi 提交于
      Implements an x86_64 assembler driver for the ChaCha20 stream cipher. This
      single block variant works on a single state matrix using SSE instructions.
      It requires SSSE3 due the use of pshufb for efficient 8/16-bit rotate
      operations.
      
      For large messages, throughput increases by ~65% compared to
      chacha20-generic:
      
      testing speed of chacha20 (chacha20-generic) encryption
      test 0 (256 bit key, 16 byte blocks): 45089207 operations in 10 seconds (721427312 bytes)
      test 1 (256 bit key, 64 byte blocks): 43839521 operations in 10 seconds (2805729344 bytes)
      test 2 (256 bit key, 256 byte blocks): 12702056 operations in 10 seconds (3251726336 bytes)
      test 3 (256 bit key, 1024 byte blocks): 3371173 operations in 10 seconds (3452081152 bytes)
      test 4 (256 bit key, 8192 byte blocks): 422468 operations in 10 seconds (3460857856 bytes)
      
      testing speed of chacha20 (chacha20-simd) encryption
      test 0 (256 bit key, 16 byte blocks): 43141886 operations in 10 seconds (690270176 bytes)
      test 1 (256 bit key, 64 byte blocks): 46845874 operations in 10 seconds (2998135936 bytes)
      test 2 (256 bit key, 256 byte blocks): 18458512 operations in 10 seconds (4725379072 bytes)
      test 3 (256 bit key, 1024 byte blocks): 5360533 operations in 10 seconds (5489185792 bytes)
      test 4 (256 bit key, 8192 byte blocks): 692846 operations in 10 seconds (5675794432 bytes)
      
      Benchmark results from a Core i5-4670T.
      Signed-off-by: NMartin Willi <martin@strongswan.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      c9320b6d
    • M
      crypto: chacha20 - Export common ChaCha20 helpers · 31d7247d
      Martin Willi 提交于
      As architecture specific drivers need a software fallback, export a
      ChaCha20 en-/decryption function together with some helpers in a header
      file.
      Signed-off-by: NMartin Willi <martin@strongswan.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      31d7247d
    • M
      crypto: tcrypt - Add ChaCha20/Poly1305 speed tests · 2dce063a
      Martin Willi 提交于
      Adds individual ChaCha20 and Poly1305 and a combined rfc7539esp AEAD speed
      test using mode numbers 214, 321 and 213. For Poly1305 we add a specific
      speed template, as it expects the key prepended to the input data.
      Signed-off-by: NMartin Willi <martin@strongswan.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      2dce063a
    • H
      crypto: chacha20poly1305 - Convert to new AEAD interface · 74790922
      Herbert Xu 提交于
      This patch converts rfc7539 and rfc7539esp to the new AEAD interface.
      The test vectors for rfc7539esp have also been updated to include
      the IV.
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      Tested-by: NMartin Willi <martin@strongswan.org>
      74790922
    • T
      crypto: rsa - limit supported key lengths · 6e8ec66c
      Tadeusz Struk 提交于
      Introduce constrains for RSA keys lengths.
      Only key lengths of 512, 1024, 1536, 2048, 3072, and 4096 bits
      will be supported.
      Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      6e8ec66c
    • T
      crypto: qat - Add support for RSA algorithm · a9905320
      Tadeusz Struk 提交于
      Add RSA support to QAT driver.
      Removed unused RNG rings.
      Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      a9905320
    • T
      crypto: qat - add MMP FW support to accel engine · 28cfaf67
      Tadeusz Struk 提交于
      Add code that loads the MMP firmware
      Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      28cfaf67
    • P
      crypto: qat - add support for MMP FW · f3dd7e60
      Pingchao Yang 提交于
      Load Modular Math Processor(MMP) firmware into QAT devices to support
      public key algorithm acceleration.
      Signed-off-by: NPingchao Yang <pingchao.yang@intel.com>
      Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      f3dd7e60
    • H
      crypto: testmgr - Reenable rfc4309 test · 544c436a
      Herbert Xu 提交于
      Now that all implementations of rfc4309 have been converted we can
      reenable the test.
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      544c436a
    • H
      crypto: nx - Convert ccm to new AEAD interface · cc815653
      Herbert Xu 提交于
      This patch converts the nx ccm and 4309 implementations to the
      new AEAD interface.
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      cc815653
    • H
      crypto: aes-ce-ccm - Convert to new AEAD interface · 2642d6ab
      Herbert Xu 提交于
      This patch converts the ARM64 aes-ce-ccm implementation to the
      new AEAD interface.
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      Reviewed-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      Tested-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      2642d6ab
    • H
      crypto: ccm - Convert to new AEAD interface · 81c4c35e
      Herbert Xu 提交于
      This patch converts generic ccm and its associated transforms to
      the new AEAD interface.
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      81c4c35e
    • H
      crypto: testmgr - Disable rfc4309 test and convert test vectors · 0bc5a6c5
      Herbert Xu 提交于
      This patch disables the rfc4309 test while the conversion to the
      new seqiv calling convention takes place.  It also replaces the
      rfc4309 test vectors with ones that will work with the new IV
      convention.
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      0bc5a6c5
  2. 14 7月, 2015 21 次提交
  3. 08 7月, 2015 1 次提交