1. 14 10月, 2016 1 次提交
  2. 13 10月, 2016 3 次提交
  3. 10 10月, 2016 2 次提交
    • R
      cpufreq: intel_pstate: Clarify comment in get_target_pstate_use_performance() · f00593a4
      Rafael J. Wysocki 提交于
      Make the comment explaining the meaning of the perf_scaled variable
      in get_target_pstate_use_performance() more straightforward.
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      f00593a4
    • S
      cpufreq: intel_pstate: Fix unsafe HWP MSR access · f9f4872d
      Srinivas Pandruvada 提交于
      This is a requirement that MSR MSR_PM_ENABLE must be set to 0x01 before
      reading MSR_HWP_CAPABILITIES on a given CPU. If cpufreq init() is
      scheduled on a CPU which is not same as policy->cpu or migrates to a
      different CPU before calling msr read for MSR_HWP_CAPABILITIES, it
      is possible that MSR_PM_ENABLE was not to set to 0x01 on that CPU.
      This will cause GP fault. So like other places in this path
      rdmsrl_on_cpu should be used instead of rdmsrl.
      
      Moreover the scope of MSR_HWP_CAPABILITIES is on per thread basis, so it
      should be read from the same CPU, for which MSR MSR_HWP_REQUEST is
      getting set.
      
      dmesg dump or warning:
      
      [   22.014488] WARNING: CPU: 139 PID: 1 at arch/x86/mm/extable.c:50 ex_handler_rdmsr_unsafe+0x68/0x70
      [   22.014492] unchecked MSR access error: RDMSR from 0x771
      [   22.014493] Modules linked in:
      [   22.014507] CPU: 139 PID: 1 Comm: swapper/0 Not tainted 4.7.5+ #1
      ...
      ...
      [   22.014516] Call Trace:
      [   22.014542]  [<ffffffff813d7dd1>] dump_stack+0x63/0x82
      [   22.014558]  [<ffffffff8107bc8b>] __warn+0xcb/0xf0
      [   22.014561]  [<ffffffff8107bcff>] warn_slowpath_fmt+0x4f/0x60
      [   22.014563]  [<ffffffff810676f8>] ex_handler_rdmsr_unsafe+0x68/0x70
      [   22.014564]  [<ffffffff810677d9>] fixup_exception+0x39/0x50
      [   22.014604]  [<ffffffff8102e400>] do_general_protection+0x80/0x150
      [   22.014610]  [<ffffffff817f9ec8>] general_protection+0x28/0x30
      [   22.014635]  [<ffffffff81687940>] ? get_target_pstate_use_performance+0xb0/0xb0
      [   22.014642]  [<ffffffff810600c7>] ? native_read_msr+0x7/0x40
      [   22.014657]  [<ffffffff81688123>] intel_pstate_hwp_set+0x23/0x130
      [   22.014660]  [<ffffffff81688406>] intel_pstate_set_policy+0x1b6/0x340
      [   22.014662]  [<ffffffff816829bb>] cpufreq_set_policy+0xeb/0x2c0
      [   22.014664]  [<ffffffff81682f39>] cpufreq_init_policy+0x79/0xe0
      [   22.014666]  [<ffffffff81682cb0>] ? cpufreq_update_policy+0x120/0x120
      [   22.014669]  [<ffffffff816833a6>] cpufreq_online+0x406/0x820
      [   22.014671]  [<ffffffff8168381f>] cpufreq_add_dev+0x5f/0x90
      [   22.014717]  [<ffffffff81530ac8>] subsys_interface_register+0xb8/0x100
      [   22.014719]  [<ffffffff816821bc>] cpufreq_register_driver+0x14c/0x210
      [   22.014749]  [<ffffffff81fe1d90>] intel_pstate_init+0x39d/0x4d5
      [   22.014751]  [<ffffffff81fe13f2>] ? cpufreq_gov_dbs_init+0x12/0x12
      
      Cc: 4.3+ <stable@vger.kernel.org> # 4.3+
      Signed-off-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      f9f4872d
  4. 26 9月, 2016 2 次提交
  5. 17 9月, 2016 3 次提交
  6. 14 9月, 2016 1 次提交
  7. 13 9月, 2016 7 次提交
    • A
      cpufreq: CPPC: Force reporting values in KHz to fix user space interface · ad38677d
      Al Stone 提交于
      When CPPC is being used by ACPI on arm64, user space tools such as
      cpupower report CPU frequency values from sysfs that are incorrect.
      
      What the driver was doing was reporting the values given by ACPI tables
      in whatever scale was used to provide them.  However, the ACPI spec
      defines the CPPC values as unitless abstract numbers.  Internal kernel
      structures such as struct perf_cap, in contrast, expect these values
      to be in KHz.  When these struct values get reported via sysfs, the
      user space tools also assume they are in KHz, causing them to report
      incorrect values (for example, reporting a CPU frequency of 1MHz when
      it should be 1.8GHz).
      
      The downside is that this approach has some assumptions:
      
         (1) It relies on SMBIOS3 being used, *and* that the Max Frequency
         value for a processor is set to a non-zero value.
      
         (2) It assumes that all processors run at the same speed, or that
         the CPPC values have all been scaled to reflect relative speed.
         This patch retrieves the largest CPU Max Frequency from a type 4 DMI
         record that it can find.  This may not be an issue, however, as a
         sampling of DMI data on x86 and arm64 indicates there is often only
         one such record regardless.  Since CPPC is relatively new, it is
         unclear if the ACPI ASL will always be written to reflect any sort
         of relative performance of processors of differing speeds.
      
         (3) It assumes that performance and frequency both scale linearly.
      
      For arm64 servers, this may be sufficient, but it does rely on
      firmware values being set correctly.  Hence, other approaches will
      be considered in the future.
      
      This has been tested on three arm64 servers, with and without DMI, with
      and without CPPC support.
      Signed-off-by: NAl Stone <ahs3@redhat.com>
      Signed-off-by: NPrashanth Prakash <pprakash@codeaurora.org>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      ad38677d
    • V
      cpufreq: create link to policy only for registered CPUs · 26619804
      Viresh Kumar 提交于
      If a cpufreq driver is registered very early in the boot stage (e.g.
      registered from postcore_initcall()), then cpufreq core may generate
      kernel warnings for it.
      
      In this case, the CPUs are brought online, then the cpufreq driver is
      registered, and then the CPU topology devices are registered. However,
      by the time cpufreq_add_dev() gets called, the cpu device isn't stored
      in the per-cpu variable (cpu_sys_devices,) which is read by
      get_cpu_device().
      
      So the cpufreq core fails to get device for the CPU, for which
      cpufreq_add_dev() was called in the first place and we will hit a
      WARN_ON(!cpu_dev).
      
      Even if we reuse the 'dev' parameter passed to cpufreq_add_dev() to
      avoid that warning, there might be other CPUs online that share the
      policy with the cpu for which cpufreq_add_dev() is called. Eventually
      get_cpu_device() will return NULL for them as well, and we will hit the
      same WARN_ON() again.
      
      In order to fix these issues, change cpufreq core to create links to the
      policy for a cpu only when cpufreq_add_dev() is called for that CPU.
      
      Reuse the 'real_cpus' mask to track that as well.
      
      Note that cpufreq_remove_dev() already handles removal of the links for
      individual CPUs and cpufreq_add_dev() has aligned with that now.
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Tested-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      26619804
    • J
      intel_pstate: constify local structures · 42ce8921
      Julia Lawall 提交于
      For structure types defined in the same file or local header files, find
      top-level static structure declarations that have the following
      properties:
      1. Never reassigned.
      2. Address never taken
      3. Not passed to a top-level macro call
      4. No pointer or array-typed field passed to a function or stored in a
      variable.
      Declare structures having all of these properties as const.
      
      Done using Coccinelle.
      Based on a suggestion by Joe Perches <joe@perches.com>.
      Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
      Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      42ce8921
    • V
      cpufreq: dt: Support governor tunables per policy · 297a6622
      Viresh Kumar 提交于
      The cpufreq-dt driver is also used for systems with multiple
      clock/voltage domains for CPUs, i.e. multiple cpufreq policies in a
      system.
      
      And in such cases the platform users may want to enable "governor
      tunables per policy". Support that via platform data, as not all users
      of the driver would want that behavior.
      Reported-by: NJuri Lelli <Juri.Lelli@arm.com>
      Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      297a6622
    • V
      cpufreq: dt: Update kconfig description · 33cc4fc1
      Viresh Kumar 提交于
      The cpufreq DT driver also supports systems that have multiple
      clock/voltage domains for CPUs, i.e. multiple policy systems.
      
      The description of the Kconfig entry was never updated after the driver
      was modified to support such systems, fix it.
      Reported-by: NJuri Lelli <Juri.Lelli@arm.com>
      Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      33cc4fc1
    • V
      cpufreq: dt: Remove unused code · e86eee6b
      Viresh Kumar 提交于
      This is leftover from an earlier patch which removed the usage of
      platform data but forgot to remove this line. Remove it now.
      Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      e86eee6b
    • G
      cpufreq: dt: Add support for r8a7792 · ffdf8b86
      Geert Uytterhoeven 提交于
      Add the compatible string for supporting the generic cpufreq driver on
      the Renesas R-Car V2H (r8a7792) SoC.
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      ffdf8b86
  8. 03 9月, 2016 4 次提交
  9. 02 9月, 2016 2 次提交
  10. 01 9月, 2016 4 次提交
  11. 31 8月, 2016 11 次提交