1. 12 3月, 2011 5 次提交
    • T
      x86: ioapic: Simplify irq chip and handler setup · c60eaf25
      Thomas Gleixner 提交于
      Use pointers instead of ugly multiline if/else constructs.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      c60eaf25
    • T
      x86: Cleanup the genirq name space · 2c778651
      Thomas Gleixner 提交于
      genirq is switching to a consistent name space for the irq related
      functions. Convert x86. Conversion was done with coccinelle.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      2c778651
    • T
      Merge branch 'irq/core' into x86/irq · c1c5e4d4
      Thomas Gleixner 提交于
      Reason: Enabling irq threads and update to latest genirq functionality
      	requires the core code
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      c1c5e4d4
    • T
      Merge branch 'x86/apic' into x86/irq · cfe08bba
      Thomas Gleixner 提交于
      Reason: Update to latest genirq code conflicts with pending apic
      	changes
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      cfe08bba
    • T
      genirq: Add chip flag to force mask on suspend · d209a699
      Thomas Gleixner 提交于
      On suspend we disable all interrupts in the core code, but this does
      not mask the interrupt line in the default implementation as we use a
      lazy disable approach. That means we mark the interrupt disabled, but
      leave the hardware unmasked. That's an optimization because we avoid
      the hardware access for the common case where no interrupt happens
      after we marked it disabled. If an interrupt happens, then the
      interrupt flow handler masks the line at the hardware level and marks
      it pending.
      
      Suspend makes use of this delayed disable as it "disables" all
      interrupts when preparing the suspend transition. Right before the
      system goes into hardware suspend state it checks whether one of the
      interrupts which is marked as a wakeup interrupt came in after
      disabling it.
      
      Most interrupt chips have a separate register which selects the
      interrupts which can wake up the system from suspend, so we don't have
      to mask any on the non wakeup interrupts.
      
      But now we have to deal with brilliant designed hardware which lacks
      such a wakeup configuration facility. For such hardware it's necessary
      to mask all non wakeup interrupts before going into suspend in order
      to avoid the wakeup from random interrupts.
      
      Rather than working around this in the affected interrupt chip
      implementations we can solve this elegant in the core code itself.
      
      Add a flag IRQCHIP_MASK_ON_SUSPEND which can be set by the irq chip
      implementation to indicate, that the interrupts which are not selected
      as wakeup sources must be masked in the suspend path. Mask them in the
      loop which checks the wakeup interrupts pending flag.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Reviewed-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
      LKML-Reference: <alpine.LFD.2.00.1103112112310.2787@localhost6.localdomain6>
      d209a699
  2. 11 3月, 2011 1 次提交
  3. 09 3月, 2011 1 次提交
  4. 02 3月, 2011 1 次提交
  5. 26 2月, 2011 6 次提交
    • T
      genirq: Provide forced interrupt threading · 8d32a307
      Thomas Gleixner 提交于
      Add a commandline parameter "threadirqs" which forces all interrupts except
      those marked IRQF_NO_THREAD to run threaded. That's mostly a debug option to
      allow retrieving better debug data from crashing interrupt handlers. If
      "threadirqs" is not enabled on the kernel command line, then there is no
      impact in the interrupt hotpath.
      
      Architecture code needs to select CONFIG_IRQ_FORCED_THREADING after
      marking the interrupts which cant be threaded IRQF_NO_THREAD. All
      interrupts which have IRQF_TIMER set are implict marked
      IRQF_NO_THREAD. Also all PER_CPU interrupts are excluded.
      
      Forced threading hard interrupts also forces all soft interrupt
      handling into thread context.
      
      When enabled it might slow down things a bit, but for debugging problems in
      interrupt code it's a reasonable penalty as it does not immediately
      crash and burn the machine when an interrupt handler is buggy.
      
      Some test results on a Core2Duo machine:
      
      Cache cold run of:
       # time git grep irq_desc
      
            non-threaded       threaded
       real 1m18.741s          1m19.061s
       user 0m1.874s           0m1.757s
       sys  0m5.843s           0m5.427s
      
       # iperf -c server
      non-threaded
      [  3]  0.0-10.0 sec  1.09 GBytes   933 Mbits/sec
      [  3]  0.0-10.0 sec  1.09 GBytes   934 Mbits/sec
      [  3]  0.0-10.0 sec  1.09 GBytes   933 Mbits/sec
      threaded
      [  3]  0.0-10.0 sec  1.09 GBytes   939 Mbits/sec
      [  3]  0.0-10.0 sec  1.09 GBytes   934 Mbits/sec
      [  3]  0.0-10.0 sec  1.09 GBytes   937 Mbits/sec
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      LKML-Reference: <20110223234956.772668648@linutronix.de>
      8d32a307
    • T
      sched: Switch wait_task_inactive to schedule_hrtimeout() · 8eb90c30
      Thomas Gleixner 提交于
      When we force thread hard and soft interrupts the startup of ksoftirqd
      would hang in kthread_bind() when wait_task_inactive() calls
      schedule_timeout_uninterruptible() because there is no softirq yet
      which will wake us up.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      LKML-Reference: <20110223234956.677109139@linutronix.de>
      8eb90c30
    • T
      genirq: Add IRQF_NO_THREAD · 0c4602ff
      Thomas Gleixner 提交于
      Some low level interrupts cannot be threaded even when we force thread
      all interrupt handlers. Add a flag to annotate such interrupts. Add
      all timer interrupts to this category by default.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      LKML-Reference: <20110223234956.578893460@linutronix.de>
      0c4602ff
    • T
      genirq: Allow shared oneshot interrupts · 9d591edd
      Thomas Gleixner 提交于
      Support ONESHOT on shared interrupts, if all drivers agree on it.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      LKML-Reference: <20110223234956.483640430@linutronix.de>
      9d591edd
    • T
      genirq: Prepare the handling of shared oneshot interrupts · b5faba21
      Thomas Gleixner 提交于
      For level type interrupts we need to track how many threads are on
      flight to avoid useless interrupt storms when not all thread handlers
      have finished yet. Keep track of the woken threads and only unmask
      when there are no more threads in flight.
      
      Yes, I'm lazy and using a bitfield. But not only because I'm lazy, the
      main reason is that it's way simpler than using a refcount. A refcount
      based solution would need to keep track of various things like
      crashing the irq thread, spurious interrupts coming in,
      disables/enables, free_irq() and some more. The bitfield keeps the
      tracking simple and makes things just work. It's also nicely confined
      to the thread code pathes and does not require additional checks all
      over the place.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      LKML-Reference: <20110223234956.388095876@linutronix.de>
      b5faba21
    • T
      genirq: Make warning in handle_percpu_event useful · 1204e956
      Thomas Gleixner 提交于
      The WARN_ON_ONCE in handle_percpu_event() which emits a warning when
      an action handler returns with interrupts enabled is not really
      useful. It does not reveal the interrupt number and handler function
      which caused it. Make it WARN_ONCE() and add the information.
      Reported-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      1204e956
  6. 24 2月, 2011 11 次提交
  7. 23 2月, 2011 6 次提交
  8. 22 2月, 2011 9 次提交