- 22 8月, 2013 7 次提交
-
-
由 Shawn Guo 提交于
Updates SSI nodes to adopt generic DMA bindings. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Alexander Shiyan 提交于
This patch adds the missing (Wireless External Interface Module) WEIM devicetree node for i.MX51 CPUs. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Huang Shijie 提交于
Add the #dma-cells property for all the sdma in all the imx platforms. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
This adds pinmux entries for USBH1/2 in ULPI mode. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
For keeping the alphabetical order in the pinmux nodes. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 17 6月, 2013 3 次提交
-
-
由 Michael Grzeschik 提交于
Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Michael Grzeschik 提交于
Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Michael Grzeschik 提交于
Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 24 5月, 2013 1 次提交
-
-
由 Jonas Andersson 提交于
The CSPI controller has only one clock, but the driver spi-imx.c needs clock "per" to calculate bitrate divisor. Signed-off-by: NJonas Andersson <jonas@microbit.se> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 09 4月, 2013 9 次提交
-
-
由 Markus Pargmann 提交于
This patch adds a cpus/cpu@0 node for imx51 with default operating points for the cpufreq-cpu0 driver. There is currently no regulator support, so the voltages are 0 here. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
This adds the PATA device and the pinctrl group for to the i.MX51 dts. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Also, link SRC to IPU via phandle. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Philipp Zabel 提交于
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
The GPT is the GPT timer found on i.MX SoCs. This patch adds the devicetree node for it. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Gwenhael Goavec-Merou 提交于
Add a second pinctrl group of pins for i2c2. Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Gwenhael Goavec-Merou 提交于
Add ecspi2 group of pins for imx51. Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Currently, all imx pinctrl drivers maintain a big array of struct imx_pin_reg which hard-codes data like register offset and mux mode setting for each pin function. Every time a new imx SoC support is added, we need to add such a big mount of data. With moving to single kernel build, it's only matter of time to be blamed on memory consuming. With DTC pre-processor support in place, the patch moves all these data into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and changing the PIN_FUNC_ID parsing code a little bit. The pin id gets re-numbered based on mux register offset, or config register offset if the pin has no mux register, so that kernel can identify the pin id from register offsets provided by device tree. As a bonus point of the change, those arbitrary magic numbers standing for particular PIN_FUNC_ID in device tree sources are now replaced by macros to improve the readability of dts files. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NDong Aisheng <dong.aisheng@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Shawn Guo 提交于
Replace /include/ (dtc) with #include (C pre-processor) for all imx DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as pinctrl settings. Use of those features will increase the readability of the device tree files. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 10 2月, 2013 2 次提交
-
-
由 Laurent Cans 提交于
Signed-off-by: NLaurent Cans <laurent.cans@gmail.com> Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Liu Ying 提交于
1) Add KPP device node entry. 2) Add one KPP pinctrl entry. Signed-off-by: NLiu Ying <Ying.Liu@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 22 11月, 2012 2 次提交
-
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
Similarly as it was done for mx6q, use a DT lookup in order to make maintainance task for the clock devices easier. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 16 11月, 2012 3 次提交
-
-
由 Sascha Hauer 提交于
This adds the IPU device to the devicetree along with the necessary pinctrl settings for the parallel display outputs. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
Having labels before each node allows board bindings to reference to nodes by using the &nodename {} notation. This way boards do not have to resemble the whole devicetree layout. Due to less indention needed the board files also get better readability. Since the label make the documentation behind the nodes unnecessary it is removed. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
According to Documentation/devicetree/bindings/mmc/mmc.txt bus-width is a mandatory property. While this is currently enforced nowhere, it's a good habit to just add the property now to allow to add common helper functionality for the mmc property parsing later. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 15 10月, 2012 1 次提交
-
-
由 Shawn Guo 提交于
This is some amount of work left/forgot from device tree conversion. Instead of checking cpu_is_xxx to determine the controller type, the driver should use platform_device_id, which should match the device tree compatible string. The patch changes the driver to use platform_device_id rather than cpu_is_xxx to determine the controller type/version. It also updates the platform code and device tree source accordingly. As the result, mach/hardware.h inclusion gets removed from the driver. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Cc: Wolfram Sang <w.sang@pengutronix.de> Cc: linux-i2c@vger.kernel.org
-
- 11 9月, 2012 1 次提交
-
-
由 Shawn Guo 提交于
Add pinctrl settings for the exsiting devices in imx51-babbage.dts. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 24 8月, 2012 3 次提交
-
-
由 Michael Grzeschik 提交于
Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
Instead of adding sdma-ram-script-name into each board dts file, move it to the SoC dtsi file instead. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
Instead of enabling the watchdog in each individual dts file, select in the SoC dtsi file instead. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 07 8月, 2012 1 次提交
-
-
由 Shawn Guo 提交于
Add alias for gpio nodes, so that gpio driver can identify the port number and then specify a sensible gpio base rather than using the one dynamically allocated by gpio core. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 18 7月, 2012 1 次提交
-
-
由 Benoît Thébaudeau 提交于
Some mxc processors have an edge_sel feature, which allows the IRQ to be triggered by any edge. This patch makes use of this feature if available, which skips mxc_flip_edge(). Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.walleij@stericsson.com> Acked-by: NSascha Hauer <kernel@pengutronix.de> Cc: <linux-arm-kernel@lists.infradead.org> Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 07 7月, 2012 2 次提交
-
-
由 Shawn Guo 提交于
Change the value of #interrupt-cells of gpio nodes from 1 to 2, so that the gpio irq type can be specified in device tree. Also update binding document to make it clear. Reported-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
This adds snippets to the i.MX51/53 devicetrees for the nand flash controller. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
-
- 11 5月, 2012 2 次提交
-
-
由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
It has been pointed out by device tree maintainer for several times that the generic names 'serial' and 'ethernet' should be used for those devices per ePAPR. Renames imx uart and fec device tree nodes to stop them being bad examples. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 14 12月, 2011 2 次提交
-
-
由 Richard Zhao 提交于
UART1/UART2/... is more readable than UART0/UART1/... . Remove redundant UART comments. Signed-off-by: NRichard Zhao <richard.zhao@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhao 提交于
GPIO1/GPIO2/... is more readable than GPIO0/GPIO1/... . Remove redundant gpio comments. Signed-off-by: NRichard Zhao <richard.zhao@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-