1. 21 5月, 2012 2 次提交
  2. 17 5月, 2012 3 次提交
    • W
      ARM: 7419/1: vfp: fix VFP flushing regression on sigreturn path · 56cb2484
      Will Deacon 提交于
      Commit ff9a184c ("ARM: 7400/1: vfp: clear fpscr length and stride bits
      on entry to sig handler") flushes the VFP state prior to entering a
      signal handler so that a VFP operation inside the handler will trap and
      force a restore of ABI-compliant registers. Reflushing and disabling VFP
      on the sigreturn path is predicated on the saved thread state indicating
      that VFP was used by the handler -- however for SMP platforms this is
      only set on context-switch, making the check unreliable and causing VFP
      register corruption in userspace since the register values are not
      necessarily those restored from the sigframe.
      
      This patch unconditionally flushes the VFP state after a signal handler.
      Since we already perform the flush before the handler and the flushing
      itself happens lazily, the redundant flush when VFP is not used by the
      handler is essentially a nop.
      Reported-by: NJon Medhurst <tixy@linaro.org>
      Signed-off-by: NJon Medhurst <tixy@linaro.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      56cb2484
    • V
      ARM: 7418/1: LPAE: fix access flag setup in mem_type_table · 1a3abcf4
      Vitaly Andrianov 提交于
      A zero value for prot_sect in the memory types table implies that
      section mappings should never be created for the memory type in question.
      This is checked for in alloc_init_section().
      
      With LPAE, we set a bit to mask access flag faults for kernel mappings.
      This breaks the aforementioned (!prot_sect) check in alloc_init_section().
      
      This patch fixes this bug by first checking for a non-zero
      prot_sect before setting the PMD_SECT_AF flag.
      Signed-off-by: NVitaly Andrianov <vitalya@ti.com>
      Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      1a3abcf4
    • B
      ARM: PRIMA2: fix irq domain size and IRQ mask of internal interrupt controller · ad3b8a83
      Barry Song 提交于
      the old codes will cause 3.4 kernel warning as irq domain size is wrong:
      ------------[ cut here ]------------
      WARNING: at kernel/irq/irqdomain.c:74 irq_domain_legacy_revmap+0x24/0x48()
      Modules linked in:
      [<c0013f50>] (unwind_backtrace+0x0/0xf8) from [<c001e7d8>] (warn_slowpath_common+0x54/0x64)
      [<c001e7d8>] (warn_slowpath_common+0x54/0x64) from [<c001e804>] (warn_slowpath_null+0x1c/0x24)
      [<c001e804>] (warn_slowpath_null+0x1c/0x24) from [<c005c3c4>] (irq_domain_legacy_revmap+0x24/0x48)
      [<c005c3c4>] (irq_domain_legacy_revmap+0x24/0x48) from [<c005c704>] (irq_create_mapping+0x20/0x120)
      [<c005c704>] (irq_create_mapping+0x20/0x120) from [<c005c880>] (irq_create_of_mapping+0x7c/0xf0)
      [<c005c880>] (irq_create_of_mapping+0x7c/0xf0) from [<c01a6c48>] (irq_of_parse_and_map+0x2c/0x34)
      [<c01a6c48>] (irq_of_parse_and_map+0x2c/0x34) from [<c01a6c68>] (of_irq_to_resource+0x18/0x74)
      [<c01a6c68>] (of_irq_to_resource+0x18/0x74) from [<c01a6ce8>] (of_irq_count+0x24/0x34)
      [<c01a6ce8>] (of_irq_count+0x24/0x34) from [<c01a7220>] (of_device_alloc+0x58/0x158)
      [<c01a7220>] (of_device_alloc+0x58/0x158) from [<c01a735c>] (of_platform_device_create_pdata+0x3c/0x80)
      [<c01a735c>] (of_platform_device_create_pdata+0x3c/0x80) from [<c01a7468>] (of_platform_bus_create+0xc8/0x190)
      [<c01a7468>] (of_platform_bus_create+0xc8/0x190) from [<c01a74cc>] (of_platform_bus_create+0x12c/0x190)
      ---[ end trace 1b75b31a2719ed32 ]---
      Signed-off-by: NBarry Song <Baohua.Song@csr.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      ad3b8a83
  3. 16 5月, 2012 1 次提交
  4. 15 5月, 2012 1 次提交
  5. 13 5月, 2012 7 次提交
  6. 12 5月, 2012 1 次提交
  7. 09 5月, 2012 3 次提交
  8. 06 5月, 2012 1 次提交
    • C
      ARM: 7414/1: SMP: prevent use of the console when using idmap_pgd · fde165b2
      Colin Cross 提交于
      Commit 4e8ee7de (ARM: SMP: use
      idmap_pgd for mapping MMU enable during secondary booting)
      switched secondary boot to use idmap_pgd, which is initialized
      during early_initcall, instead of a page table initialized during
      __cpu_up.  This causes idmap_pgd to contain the static mappings
      but be missing all dynamic mappings.
      
      If a console is registered that creates a dynamic mapping, the
      printk in secondary_start_kernel will trigger a data abort on
      the missing mapping before the exception handlers have been
      initialized, leading to a hang.  Initial boot is not affected
      because no consoles have been registered, and resume is usually
      not affected because the offending console is suspended.
      Onlining a cpu with hotplug triggers the problem.
      
      A workaround is to the printk in secondary_start_kernel until
      after the page tables have been switched back to init_mm.
      
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NColin Cross <ccross@android.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      fde165b2
  9. 05 5月, 2012 5 次提交
  10. 28 4月, 2012 4 次提交
    • W
      ARM: 7406/1: hotplug: copy the affinity mask when forcefully migrating IRQs · 5e7371de
      Will Deacon 提交于
      When a CPU is hotplugged off, we migrate any IRQs currently affine to it
      away and onto another online CPU by calling the irq_set_affinity
      function of the relevant interrupt controller chip. This function
      returns either IRQ_SET_MASK_OK or IRQ_SET_MASK_OK_NOCOPY, to indicate
      whether irq_data.affinity was updated.
      
      If we are forcefully migrating an interrupt (because the affinity mask
      no longer identifies any online CPUs) then we should update the IRQ
      affinity mask to reflect the new CPU set. Failure to do so can
      potentially leave /proc/irq/n/smp_affinity identifying only offline
      CPUs, which may confuse userspace IRQ balancing daemons.
      
      This patch updates migrate_one_irq to copy the affinity mask when
      the interrupt chip returns IRQ_SET_MASK_OK after forcefully changing the
      affinity of an interrupt.
      
      Cc: stable@vger.kernel.org
      Reported-by: NLeif Lindholm <leif.lindholm@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      5e7371de
    • W
      ARM: 7405/1: kexec: call platform_cpu_kill on the killer rather than the victim · 6fa99b7f
      Will Deacon 提交于
      When performing a kexec on an SMP system, the secondary cores are stopped
      by calling machine_shutdown(), which in turn issues IPIs to offline the
      other CPUs. Unfortunately, this isn't enough to reboot the cores into
      a new kernel (since they are just executing a cpu_relax loop somewhere
      in memory) so we make use of platform_cpu_kill, part of the CPU hotplug
      implementation, to place the cores somewhere safe. This function expects
      to be called on the killing CPU for each core that it takes out.
      
      This patch moves the platform_cpu_kill callback out of the IPI handler
      and into smp_send_stop, therefore ensuring that it executes on the
      killing CPU rather than on the victim, matching what the hotplug code
      requires.
      
      Cc: stable@vger.kernel.org
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      6fa99b7f
    • W
      ARM: 7403/1: tls: remove covert channel via TPIDRURW · 6a1c5312
      Will Deacon 提交于
      TPIDRURW is a user read/write register forming part of the group of
      thread registers in more recent versions of the ARM architecture (~v6+).
      
      Currently, the kernel does not touch this register, which allows tasks
      to communicate covertly by reading and writing to the register without
      context-switching affecting its contents.
      
      This patch clears TPIDRURW when TPIDRURO is updated via the set_tls
      macro, which is called directly from __switch_to. Since the current
      behaviour makes the register useless to userspace as far as thread
      pointers are concerned, simply clearing the register (rather than saving
      and restoring it) will not cause any problems to userspace.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      6a1c5312
    • S
      ARM: 7401/1: mm: Fix section mismatches · 14904927
      Stephen Boyd 提交于
      WARNING: vmlinux.o(.text+0x111b8): Section mismatch in reference
      from the function arm_memory_present() to the function
      .init.text:memory_present()
      The function arm_memory_present() references
      the function __init memory_present().
      This is often because arm_memory_present lacks a __init
      annotation or the annotation of memory_present is wrong.
      
      WARNING: arch/arm/mm/built-in.o(.text+0x1edc): Section mismatch
      in reference from the function alloc_init_pud() to the function
      .init.text:alloc_init_section()
      The function alloc_init_pud() references
      the function __init alloc_init_section().
      This is often because alloc_init_pud lacks a __init
      annotation or the annotation of alloc_init_section is wrong.
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      14904927
  11. 27 4月, 2012 4 次提交
  12. 26 4月, 2012 1 次提交
  13. 25 4月, 2012 5 次提交
  14. 24 4月, 2012 1 次提交
  15. 23 4月, 2012 1 次提交
    • R
      ARM: OMAP: fix DMA vs memory ordering · 35453584
      Russell King 提交于
      Using coherent DMA memory with the OMAP DMA engine results in
      unpredictable behaviour due to memory ordering issues; as things stand,
      there is no guarantee that data written to coherent DMA memory will be
      visible to the DMA hardware.
      
      This is because the OMAP dma_write() accessor contains no barriers,
      necessary on ARMv6 and above.  The effect of this can be seen in comments
      in the OMAP serial driver, which incorrectly talks about cache flushing
      for the coherent DMA stuff.
      
      Rather than adding barriers to the accessors, add it in the DMA support
      code just before we enable DMA, and just after we disable DMA.  This
      avoids having barriers for every DMA register access.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      35453584