1. 11 7月, 2014 15 次提交
  2. 03 7月, 2014 3 次提交
    • L
      powerpc/85xx: drop hypervisor specific board compatibles · cd115477
      Laurentiu TUDOR 提交于
      They're almost a duplicate of the boards array
      and we can build them at run-time.
      Signed-off-by: NLaurentiu Tudor <Laurentiu.Tudor@freescale.com>
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      cd115477
    • S
      powerpc/fsl-booke: Add initial T208x QDS board support · 4c18be2b
      Shengzhou Liu 提交于
      Add support for Freescale T2080/T2081 QDS Development System Board.
      
      The T2080QDS Development System is a high-performance computing,
      evaluation, and development platform that supports T2080 QorIQ
      Power Architecture processor, with following major features:
      
      T2080QDS feature overview:
      Processor:
       - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
      Memory:
       - Single memory controller capable of supporting DDR3 and DDR3-LP
       - Dual DIMM slots up 2133MT/s with ECC
      Ethernet interfaces:
       - Two 1Gbps RGMII on-board ports
       - Four 10Gbps XFI on-board cages
       - 1Gbps/2.5Gbps SGMII Riser card
       - 10Gbps XAUI Riser card
      Accelerator:
       - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
      SerDes:
       - 16 lanes up to 10.3125GHz
       - Supports Aurora debug, PEX, SATA, SGMII, sRIO, HiGig, XFI and XAUI
      IFC:
       - 128MB NOR Flash, 512MB NAND Flash, PromJet debug port and FPGA
      eSPI:
       - Three SPI flash (16MB N25Q128A + 8MB EN25S64 + 512KB SST25WF040)
      USB:
       - Two USB2.0 ports with internal PHY (one Type-A + one micro Type-AB)
      PCIE:
       - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0, SR-IOV)
      SATA:
       - Two SATA 2.0 ports on-board
      SRIO:
       - Two Serial RapidIO 2.0 ports up to 5 GHz
      eSDHC:
       - Supports SD/MMC/eMMC Card
      DMA:
       - Three 8-channels DMA controllers
      I2C:
       - Four I2C controllers.
      UART:
       - Dual 4-pins UART serial ports
      System Logic:
       - QIXIS-II FPGA system controll
      
      T2081QDS board shares the same PCB with T1040QDS with some differences.
      Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      4c18be2b
    • S
      powerpc/fsl-booke: Add support for T2080/T2081 SoC · 1d8de8fc
      Shengzhou Liu 提交于
      The T2080 QorIQ multicore processor combines four dual-threaded e6500 Power
      Architecture processor cores with high-performance datapath acceleration
      logic and network and peripheral bus interfaces required for networking,
      telecom/datacom, wireless infrastructure, and mil/aerospace applications.
      
      The T2080 SoC includes the following function and features:
      - Four dual-threaded 64-bit Power architecture e6500 cores, up to 1.8GHz
      - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
      - Hierarchical interconnect fabric
      - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
      - Data Path Acceleration Architecture (DPAA) incorporating acceleration
      - 16 SerDes lanes up to 10.3125 GHz
      - 8 Ethernet interfaces (multiple 1G/2.5G/10G MACs)
      - High-speed peripheral interfaces
        - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0)
        - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz
      - Additional peripheral interfaces
        - Two serial ATA (SATA 2.0) controllers
        - Two high-speed USB 2.0 controllers with integrated PHY
        - Enhanced secure digital host controller (SD/SDXC/eMMC)
        - Enhanced serial peripheral interface (eSPI)
        - Four I2C controllers
        - Four 2-pin UARTs or two 4-pin UARTs
        - Integrated Flash Controller supporting NAND and NOR flash
      - Three eight-channel DMA engines
      - Support for hardware virtualization and partitioning enforcement
      - QorIQ Platform's Trust Architecture 2.0
      
      T2081 is a reduced personality of T2080 with following difference:
      Feature               T2080 T2081
      1G Ethernet numbers:  8     6
      10G Ethernet numbers: 4     2
      SerDes lanes:         16    8
      Serial RapidIO,RMan:  2     no
      SATA Controller:      2     no
      Aurora:               yes   no
      SoC Package:          896-pins 780-pins
      Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>
      [scottwood@freescale.com: added fsl,qoriq-pci-v3.0 for U-Boot compat]
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      1d8de8fc
  3. 26 6月, 2014 5 次提交
  4. 25 6月, 2014 3 次提交
    • S
      powerpc: Don't skip ePAPR spin-table CPUs · 6663a4fa
      Scott Wood 提交于
      Commit 59a53afe "powerpc: Don't setup
      CPUs with bad status" broke ePAPR SMP booting.  ePAPR says that CPUs
      that aren't presently running shall have status of disabled, with
      enable-method being used to determine whether the CPU can be enabled.
      
      Fix by checking for spin-table, which is currently the only supported
      enable-method.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Cc: Michael Neuling <mikey@neuling.org>
      Cc: Emil Medve <Emilian.Medve@Freescale.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6663a4fa
    • L
      powerpc/module: Fix TOC symbol CRC · c2cbcf53
      Laurent Dufour 提交于
      The commit 71ec7c55 introduced the magic symbol ".TOC." for ELFv2 ABI.
      This symbol is built manually and has no CRC value computed. A zero value
      is put in the CRC section to avoid modpost complaining about a missing CRC.
      Unfortunately, this breaks the kernel module loading when the kernel is
      relocated (kdump case for instance) because of the relocation applied to
      the kcrctab values.
      
      This patch compute a CRC value for the TOC symbol which will match the one
      compute by the kernel when it is relocated - aka '0 - relocate_start' done in
      maybe_relocated called by check_version (module.c).
      Signed-off-by: NLaurent Dufour <ldufour@linux.vnet.ibm.com>
      Cc: Anton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c2cbcf53
    • M
      powerpc/powernv: Remove OPAL v1 takeover · e2500be2
      Michael Ellerman 提交于
      In commit 27f44888 "Add OPAL takeover from PowerVM" we added support
      for "takeover" on OPAL v1 machines.
      
      This was a mode of operation where we would boot under pHyp, and query
      for the presence of OPAL. If detected we would then do a special
      sequence to take over the machine, and the kernel would end up running
      in hypervisor mode.
      
      OPAL v1 was never a supported product, and was never shipped outside
      IBM. As far as we know no one is still using it.
      
      Newer versions of OPAL do not use the takeover mechanism. Although the
      query for OPAL should be harmless on machines with newer OPAL, we have
      seen a machine where it causes a crash in Open Firmware.
      
      The code in early_init_devtree() to copy boot_command_line into cmd_line
      was added in commit 817c21ad "Get kernel command line accross OPAL
      takeover", and AFAIK is only used by takeover, so should also be
      removed.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e2500be2
  5. 24 6月, 2014 13 次提交
  6. 21 6月, 2014 1 次提交