- 14 3月, 2016 1 次提交
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由 Chun-Hao Lin 提交于
For pcie nic, after setting link speed and there is no link driver does not need to do phy reset until link up. For some pcie nics, to do this will also reset phy speed down counter and prevent phy from auto speed down. This patch fix the issue reported in following link. https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1547151Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 3月, 2016 1 次提交
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由 Chunhao Lin 提交于
For RTL8168G/RTL8168H/RTL8411B/RTL8107E, enable this flag to eliminate message "AMD-Vi: Event logged [IO_PAGE_FAULT device=01:00.0 domain=0x0002 address=0x0000000000003000 flags=0x0050] in dmesg. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 2月, 2016 1 次提交
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由 Chun-Hao Lin 提交于
There will be a log spam when there is no cable plugged. Please refer to following links. https://bugzilla.kernel.org/show_bug.cgi?id=104351 https://bugzilla.kernel.org/show_bug.cgi?id=107421 This issue is caused by runtime power management. When there is no cable plugged, the driver will be suspend (runtime suspend) by OS and NIC will be put into the D3 state. During this time, if OS call rtl8169_get_stats64() to dump tally counter, because NIC is in D3 state, the register value read by driver will return all 0xff. This will let driver think tally counter flag is not toggled and then sends the warning message "rtl_counters_cond == 1 (loop: 1000, delay: 10)" to kernel log. For fixing this issue, 1.add checking driver's pm runtime status in rtl8169_get_stats64(). 2.dump tally counter before going runtime suspend for counter accuracy in runtime suspend. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 2月, 2016 1 次提交
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由 Chun-Hao Lin 提交于
There are typos in setting RTL8168H hardware parameters. If system install another version driver that may cuase system hang. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 1月, 2016 3 次提交
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由 Chun-Hao Lin 提交于
The original way is wrong, it always writes ephy reg 0x03. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
The PHY PFM register is in PHY page 0x0a44 register 0x11, not 0x14. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
The register for setting D3code PFM mode is MISC_1, not DLLPR. Signed-off-by: NChunhao Lin <hau@realtek.com> Reviewed-by: NFrancois Romieu <romieu@fr.zoreil.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 12月, 2015 2 次提交
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由 Chun-Hao Lin 提交于
The vlaue of RTL8168H PHY register "rg_saw_cnt" only valid from bit0 to bit13. When read this register, add bitwise-anding its value with 0x3fff. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
In function "rtl8168h_2_hw_phy_config", there is a typo in setting RTL8168H PHY parameter. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 11月, 2015 1 次提交
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由 françois romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Reported-by: NDave Jones <davej@codemonkey.org.uk> Fixes: d7d2d89d ("r8169: Add software counter for multicast packages") Acked-by: NEric Dumazet <edumazet@google.com> Acked-by: NCorinna Vinschen <vinschen@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 9月, 2015 1 次提交
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由 Andrzej Hajda 提交于
The function can return negative value. The problem has been detected using proposed semantic patch scripts/coccinelle/tests/assign_signed_to_unsigned.cocci [1]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2046107Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 9月, 2015 1 次提交
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由 Corinna Vinschen 提交于
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=104031 Fixes: 6e85d5ad Based on the discussion starting at http://www.spinics.net/lists/netdev/msg342193.html Tested locally on RTL8168evl/8111evl with various concurrent processes accessing /proc/net/dev while changing the link state as well as removing/reloading the r8169 module. Signed-off-by: NCorinna Vinschen <vinschen@redhat.com> Tested-by: Npoma <pomidorabelisima@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 8月, 2015 1 次提交
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由 Corinna Vinschen 提交于
The multicast hardware counter on 8168/8111 chips is only 32 bit while the statistics in struct rtnl_link_stats64 are 64 bit. Given that statistics are requested on an irregular basis, an overflow of the hardware counter can go unnoticed. To count even very large numbers of multicast packets reliably, add a software counter and remove previously applied code to fill the multicast field requested by @rtl8169_get_stats64 with the values read from the rx_multicast hardware counter. Signed-off-by: NCorinna Vinschen <vinschen@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 8月, 2015 1 次提交
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由 Corinna Vinschen 提交于
The r8169 driver collects statistical information returned by @get_stats64 by counting them in the driver itself, even though many (but not all) of the values are already collected by tally counters (TCs) in the NIC. Some of these TC values are not returned by @get_stats64. Especially the received multicast packages are missing from /proc/net/dev. Rectify this by fetching the TCs and returning them from rtl8169_get_stats64. The counters collected in the driver obviously disappear as soon as the driver is unloaded so after a driver is loaded the counters always start at 0. The TCs on the other hand are only reset by a power cycle. Without further considerations the values collected by the driver would not match up against the TC values. This patch introduces a new function rtl8169_reset_counters which resets the TCs. Also, since rtl8169_reset_counters shares most of its code with rtl8169_update_counters, refactor the shared code into two new functions rtl8169_map_counters and rtl8169_unmap_counters. Unfortunately chip versions prior to RTL_GIGA_MAC_VER_19 don't allow to reset the TCs programatically. Therefore introduce an addition to the rtl8169_private struct and a function rtl8169_init_counter_offsets to store the TCs at first rtl_open. Use these values as offsets in rtl8169_get_stats64. Propagate a failure to reset *and* update the counters up to rtl_open and emit a warning message, if so. Signed-off-by: NCorinna Vinschen <vinschen@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 8月, 2015 1 次提交
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由 Ivan Vecera 提交于
Enforcing this flag in RxConfig for the mentioned chips fixes netdev watchdog issues prepended with AMD IOMMU message(s) like: AMD-Vi: Event logged [IO_PAGE_FAULT device=01:00.0 domain=0x001d address=0x0000000000003000 flags=0x0050] Note that this flag is also set in Realtek's own driver for these chips. Signed-off-by: NIvan Vecera <ivecera@redhat.com> Tested-by: NAlexander Lindqvist <alexander@bitspace.se> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 5月, 2015 1 次提交
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由 Alexander Duyck 提交于
The function r8169_csum_workaround is called in the ndo_start_xmit path of the r8169 driver. As such it should not be using dev_kfree_skb as it is not irq safe, so instead we should be using dev_kfree_skb_any for freeing in the dropped path, and dev_consume_skb_any for any frames that were transmitted. Signed-off-by: NAlexander Duyck <alexander.h.duyck@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 2月, 2015 1 次提交
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由 Yannick Guerrini 提交于
Change 'firwmare' to 'firmware' Signed-off-by: NYannick Guerrini <yguerrini@tomshardware.fr> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 2月, 2015 1 次提交
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由 David S. Miller 提交于
There are certain regressions which are pointing to these two commits which we are having a hard time resolving. So revert them for now. Specifically this reverts: commit 0bec3b70 Author: Florian Westphal <fw@strlen.de> Date: Wed Jan 7 10:49:49 2015 +0100 r8169: add support for xmit_more and commit 1e918876 Author: Florian Westphal <fw@strlen.de> Date: Wed Oct 1 13:38:03 2014 +0200 r8169: add support for Byte Queue Limits There were some attempts by Eric Dumazet to address some obvious problems in the TX flow, to see if they would fix the problems, but none of them seem to help for the regression reporters. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 1月, 2015 1 次提交
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由 Rafał Miłecki 提交于
Replace a magic number with a PCI #define symbol. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NDavid S. Miller <davem@davemloft.net>
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- 14 1月, 2015 1 次提交
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由 Jiri Pirko 提交于
The same macros are used for rx as well. So rename it. Signed-off-by: NJiri Pirko <jiri@resnulli.us> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 1月, 2015 1 次提交
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由 Florian Westphal 提交于
Delay update of hw tail descriptor if we know that another skb is going to be sent. Signed-off-by: NFlorian Westphal <fw@strlen.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 12月, 2014 2 次提交
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由 Chun-Hao Lin 提交于
Add ephy parameter to rtl8168g. Also change the common function of rtl8168g from "rtl_hw_start_8168g_1" to "rtl_hw_start_8168g". And function "rtl_hw_start_8168g_1" is used for setting rtl8168g hardware parameters. Following is the explanation of what hardware parameter change for. rtl8168g may erroneous judge the PCIe signal quality and show the error bit on PCI configuration space when in PCIe low power mode. The following ephy parameters are for above issue. { 0x00, 0x0000, 0x0008 } { 0x0c, 0x37d0, 0x0820 } { 0x1e, 0x0000, 0x0001 } rtl8168g may return to PCIe L0 from PCIe L0s low power mode too slow. The following ephy parameter is for above issue. { 0x19, 0x8000, 0x0000 } Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Duyck 提交于
The r8169 use a pair of wmb() calls when setting up the descriptor rings. The first is to synchronize the descriptor data with the descriptor status, and the second is to synchronize the descriptor status with the use of the MMIO doorbell to notify the device that descriptors are ready. This can come at a heavy price on some systems, and is not really necessary on systems such as x86 as a simple barrier() would suffice to order store/store accesses. As such we can replace the first memory barrier with dma_wmb() to reduce the cost for these accesses. In addition the r8169 uses a rmb() to prevent compiler optimization in the cleanup paths, however by moving the barrier down a few lines and replacing it with a dma_rmb() we should be able to use it to guarantee descriptor accesses do not occur until the device has updated the DescOwn bit from its end. One last change I made is to move the update of cur_tx in the xmit path to after the wmb. This way we can guarantee the device and all CPUs should see the DescOwn update before they see the cur_tx value update. Cc: Realtek linux nic maintainers <nic_swsd@realtek.com> Cc: Francois Romieu <romieu@fr.zoreil.com> Signed-off-by: NAlexander Duyck <alexander.h.duyck@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 12月, 2014 1 次提交
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由 Alexander Duyck 提交于
This replaces most of the calls to netdev_alloc_skb_ip_align in the Realtek drivers. The one instance I didn't replace in 8139cp.c is because it was called as a part of init and as such is not always accessed from the softirq context. Cc: Realtek linux nic maintainers <nic_swsd@realtek.com> Signed-off-by: NAlexander Duyck <alexander.h.duyck@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 12月, 2014 3 次提交
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由 Alexander Duyck 提交于
Replace rtl_skb_pad with eth_skb_pad since they do the same thing. Cc: Realtek linux nic maintainers <nic_swsd@realtek.com> Signed-off-by: NAlexander Duyck <alexander.h.duyck@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
Cmac engine is the bridge between driver and dash firmware. Other os may not disable cmac when leave. And r8169 did not allocate any resources for cmac engine. Disable it to prevent abnormal system behavior. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
For RTL8168G/GU/H/EP and RTL8411B remove enable tx/rx from its own hw_start function. This will prevent enable tx/rx before complete hardware tx/rx setting. Tx/Rx will be enabled in the end of function rtl_hw_start_8168. Signed-off-by: NChunhao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 10月, 2014 1 次提交
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由 Chun-Hao Lin 提交于
RTL8168EP is Realtek PCIe Gigabit Ethernet controller with DASH support. It is a successor chip of RTL8168DP. For RTL8168EP, the read/write ocp register is via eri channel type 2, so I move ocp_xxx() related functions under rtl_eri_xxx. And use r8168dp_ocp_xxx() for RTL8168DP ocp read/write, r8168ep_ocp_xxx() for RTL8168EP ocp read/write. The way of checking dash enable is different with RTL8168DP. I use r8168dp_check_dash()for RTL8168DP and r8168ep_check_dash() for RTL8168EP, to check if dash is enabled. The driver_start() and driver_stop() of RTL8168EP is also different with RTL8168DP. I use rtl8168dp_driver_xxx() for RTL8168DP and rtl8168ep_driver_xxx for RTL8168EP. Right now, RTL8168EP phy mcu did not need firmware code patch, so I did not add firmware code for it. so I did not add firmware code for it. Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 10月, 2014 11 次提交
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由 Florian Westphal 提交于
tested on RTL8168d/8111d model using 'super_netperf 40' with TCP/UDP_STREAM. Output of while true; do for n in inflight limit; do echo -n $n\ ; cat $n; done; sleep 1; done during netperf run, 100mbit peer: inflight 0 limit 3028 inflight 6056 limit 4542 [ trimmed output for brevity, no limit/inflight changes during test steady-state ] limit 4542 inflight 3028 limit 6122 inflight 0 limit 6122 [ changed cable to 1gbit peer, restart netperf ] inflight 37850 limit 36336 inflight 33308 limit 31794 inflight 33308 limit 31794 inflight 27252 limit 25738 [ again, no changes during test ] inflight 27252 limit 25738 inflight 0 limit 28766 [ change cable to 100mbit peer, restart netperf ] limit 28766 inflight 27370 limit 28766 inflight 4542 limit 5990 inflight 6056 limit 4542 [ .. ] inflight 6056 limit 4542 inflight 0 [end of test] Cc: Francois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com> Signed-off-by: NFlorian Westphal <fw@strlen.de> Acked-by: NEric Dumazet <edumazet@google.com> Acked-by: NTom Herbert <therbert@google.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
These two functions are used to inform dash firmware that driver is been brought up or brought down. So call these two functions only when hardware dash function is enabled. Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
In function "rtl8168_oob_notify", using function "rtl_eri_write" to access eri register 0xe8, instead of using MAC register "ERIDR" and "ERIAR" to access it. For using function "rtl_eri_write" in function "rtl8168_oob_notify", need to move down "rtl8168_oob_notify" related functions under the function "rtl_eri_write". Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
DASH function not only RTL8168DP can support, but also RTL8168EP. So change the name of function "r8168dp_check_dash" to "r8168_check_dash". Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
Change the name of function "rtl_w1w0_eri" to "rtl_w0w1_eri". In this function, the local variable "val" is "write zeros then write ones". Please see below code. (val & ~m) | p In this patch, change the function name from "xx_w1w0_xx" to "xx_w0w1_xx". The changed function name is more suitable for it's behavior. Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
Change function name from "rtl_w1w0_phy" to "rtl_w0w1_phy". And its behavior from "write ones then write zeros" to "write zeros then write ones". In Realtek internal driver, bitwise operations are almost "write zeros then write ones". For easy to port hardware parameters from Realtek internal driver to Linux kernal driver "r8169", we would like to change this function's behavior and its name. Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
For RTL8168F RTL8168FB RTL8168G RTL8168GU RTL8411 RTL8411B RTL8402 RTL8107E, the magic packet enable bit is changed to eri 0xde bit0. In this patch, change magic packet enable bit of these chips to eri 0xde bit0. Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
RTL8168FB RTL8168G RTL8168GU RTL8411 RTL8411B RTL8106EUS RTL8402 can support get mac address from backup mac address register. Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
RTL8411B can support disable/enable pll function. Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
RTL8168G also can disable/enable pll function. Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chun-Hao Lin 提交于
Signed-off-by: NChun-Hao Lin <hau@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 9月, 2014 1 次提交
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由 Dan Carpenter 提交于
There is an extra semi-colon so __rtl8169_set_features() is called every time. Fixes: 929a031d ('r8169: adjust __rtl8169_set_features') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: Hayes Wang <hayeswang@realtek.com>-- Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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