1. 13 3月, 2013 5 次提交
  2. 06 2月, 2013 1 次提交
    • J
      spi/bcm63xx: work around inability to keep CS up · b17de076
      Jonas Gorski 提交于
      This SPI controller does not support keeping CS asserted after sending
      a transfer.
      Since messages expected on this SPI controller are rather short, we can
      work around it for normal use cases by sending all transfers at once in
      a big full duplex stream.
      
      This means that we cannot change the speed between transfers if they
      require CS to be kept asserted, but these would have been rejected
      before anyway because of the inability of keeping CS asserted.
      Signed-off-by: NJonas Gorski <jogo@openwrt.org>
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      b17de076
  3. 05 2月, 2013 1 次提交
  4. 08 12月, 2012 1 次提交
  5. 17 10月, 2012 3 次提交
  6. 17 8月, 2012 1 次提交
    • F
      MIPS: BCM63xx: Fix SPI message control register handling for BCM6338/6348. · 5a670445
      Florian Fainelli 提交于
      BCM6338 and BCM6348 have a message control register width of 8 bits, instead
      of 16-bits like what the SPI driver assumes right now. Also the SPI message
      type shift value of 14 is actually 6 for these SoCs.
      This resulted in transmit FIFO corruption because we were writing 16-bits
      to an 8-bits wide register, thus spanning on the first byte of the transmit
      FIFO, which had already been filed in bcm63xx_spi_fill_txrx_fifo().
      
      Fix this by passing the message control register width and message type
      shift through platform data back to the SPI driver so that it can use
      it properly.
      Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
      Cc: linux-mips@linux-mips.org
      Cc: grant.likely@secretlab.ca
      Cc: spi-devel-general@lists.sourceforge.net
      Cc: jonas.gorski@gmail.com
      Patchwork: https://patchwork.linux-mips.org/patch/3983/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      5a670445
  7. 13 8月, 2012 1 次提交
  8. 23 7月, 2012 1 次提交
  9. 28 4月, 2012 3 次提交
  10. 10 3月, 2012 1 次提交