This patch is a take two of adding full functionality to PLL1 on
AT32AP7000.  This allows board-specific code and drivers to configure
and enable PLL1. This is useful when precise control over the
frequency of e.g. a genclock is needed and requested by users for the
ABDAC device.

The patch is based upon previous patches from both Haavard Skinnemoen
and David Brownell.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This combines three patches from David Brownell:
  * avr32: tclib support
  * avr32: simplify clocksources
  * avr32: Turn count/compare into a oneshot clockevent device

Register both TC blocks (instead of just the first one) so that
the AT32/AT91 tclib code will pick them up (instead of just the
avr32-only PIT-style clocksource).

Rename the first one and its resources appropriately.

More cleanups to the cycle counter clocksource code

 - Disable all the weak symbol magic; remove the AVR32-only TCB-based
   clocksource code (source and header).

 - Mark the __init code properly.

 - Don't forget to report IRQF_TIMER.

 - Make the system work properly with this clocksource, by preventing
   use of the CPU "idle" sleep state in the idle loop when it's used.

Package the avr32 count/compare timekeeping support as a oneshot
clockevent device, so it supports NO_HZ and high res timers.
This means it also supports plugging in other clockevent devices
and clocksources.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Create a new file, pm-at32ap700x.S, in mach-at32ap and move the CPU
idle sleep code there. Make it possible to disable the sleep code.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Move the only thing that was actually implemented and used in
asm/intc.h, intc_get_pending(), into asm/irq.h and delete asm/intc.h
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

New-style I2C drivers require that motherboard-mounted I2C devices are
registered with the I2C core, typically at arch_initcall time.  This
can be done nice and neat by passing the struct i2c_board_info[]
through at32_add_device_twi just like we do for the SPI board info.

While we've got the hood up, remove a duplicate declaration of
at32_add_device_twi() in board.h.

[hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration]
Signed-Off-By: NBen Nizette <bn@niasdigital.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

The atmel_usba_udc driver is being used by several platforms and arches
(avr32 and at91 ATM), and each platform may have different endpoint
settings.

The patch below moves the endpoint declarations into the platform
data and make the necessary adjustments for AVR32 (improved by
Haavard Skinnemoen <hskinnemoen@atmel.com>).
Signed-off-by: NStelian Pop <stelian@popies.net>
Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

PWM device setup, and a simple PWM driver exposing a programming interface
giving access to each channel's full capabilities.  Note that this doesn't
support starting several channels in synch.

[hskinnemoen@atmel.com: allocate platform device dynamically]
[hskinnemoen@atmel.com: Kconfig fix]
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Teach AVR32 to use the "GPIO Library" when exposing its GPIOs, so that signals
on external chips (like GPIO expanders) can easily be used.

This mostly reorganizes some existing logic, with two minor changes in
behavior:

 - The PSR registers are used instead of the previous "gpio_mask" values,
   matching AT91 behavior and removing some duplication between that role
   and that of "pinmux_mask".

 - NR_IRQs grew to acommodate a bank of external GPIOs.  Eventually this
   number should probably become a board-specific config option.

There's a debugfs dump of status for the built-in GPIOs, showing which pins
have deglitching, pullups, or open drain drive enabled, as well as the ID
string used when requesting each IRQ.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Acked-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Jean Delvare <khali@linux-fr.org>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

David Brownell pointed out a mismatch in the avr32 extint code:

> I noticed a small glitch that's not fixed by this patch:  the
> initial type is falling edge, but IRQ_TYPE_NONE is mapped to
> IRQ_TYPE_LEVEL_LOW.  Potentially surprising.

Fix it by setting the initial type (and handler) to low level,
matching the meaning of IRQ_TYPE_NONE.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Update the AVR32 EIC code to use the new __set_irq_handler_unlocked()
call, getting rid of one more instance of this widespread problem.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Change the NMI handler to use the die notifier chain to signal anyone
who cares. Add a simple "nmi debugger" which hooks into this chain and
that may dump registers, task state, etc. when it happens.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

These are derivatives of the AT32AP7000 chip, which means that most of
the code stays the same. Rename a few files, functions, definitions
and config symbols to reflect that they apply to all AP700x chips, and
exclude some platform devices from chips where they aren't present.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Oprofile needs to call intc_get_pending() in order to determine
whether a performance counter interrupt is pending.

Also, include the header which declares intc_get_pending() and fix the
definition to match the prototype.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

There's a duplicate clock index between USART0 and USART1 which may be
causing system crashes when USART0 is used.  Change the USART0 index
to '3', indicating the clock that is actually used by USART0.
Signed-off-by: NBen Nizette <ben@niasdigital.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch extends the I/O resource to 0xfff000cf which will enable the
watchdog driver to access the reset cause (RCAUSE) register. Making it
capable of reporting boot status.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Signed-off-by: NAlejandro Martinez Ruiz <alex@flawedcode.org>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Implement at32_add_device_cf() which will add a platform_device for
the at32_cf driver (not merged yet). Separate out most of the
at32_add_device_ide() code and use it to implement
at32_add_device_cf() as well.

This changes the API in the following ways:
  * The board code must initialize data->cs to the chipselect ID to
    use before calling any of these functions.
  * The board code must use GPIO_PIN_NONE to indicate unused CF pins.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Implement functions for adding platform devices for TWI, MCI, AC97C
and ABDAC. They may need to be modified to cope with platform data,
etc. when the corresponding drivers are ready to be merged, but such
changes are much less likely to conflict than adding support for a
whole new type of device.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch adds platform code for PATA devices on the AP7000.

[hskinnemoen@atmel.com: board code left out for now since stk1000
	doesn't support IDE out of the box]
Signed-off-by: NKristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch makes the SMC configuration take timings in clock cycles
instead of nanoseconds. A function to calculate timings in clock
cycles is added.

This patch removes the rounding troubles of the previous SMC
configuration method.

[hskinnemoen@atmel.com: fix atstk1002/atngw100 flash config]
Signed-off-by: NKristoffer Nyborg Gregertsen <gregerts@stud.ntnu.no>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Implement at32_add_device_usba() and use it to wire up the USBA device
on ATSTK1000 and ATNGW100.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch add multidrive support for pio driver
Signed-off-by: NMatteo Vit - Dave S.r.l. <matteo.vit@dave.eu>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

When debugfs is available, /sys/kernel/debug/at32ap_clk will provide a
dump of the power manager registers and of the current clock tree.  This
can help sorting out various surprises, and when making runtime PM work.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

We don't want to redefine this in every file that needs to access
the PM.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch adds register definitions, clocks and IRQs to the platform devices.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch enables CPU frequency scaling for AT32AP devices. This will
enable the CPU to scale between the speed of the high speed bus and
the master clock and thus save some power.

The patch also adds a parent to cpu_clk and a cpu_clk_set_rate to
enable changing the CPU clock divider in a sane way.

The driver does not check if the given rate is 0, thus resulting in a
div by 0.  I think this check should be go into the clk_set_rate
framework, and not here.

Tested on AT32AP7000/ATSTK1000.

Hardware documentation can be found in the AT32AP7000 datasheet.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Split the SM platform device into separate platform devices for PM,
RTC, WDT and EIC. This is more correct according to the documentation
and allows us to simplify the code a little.

Also turn the EIC driver into a real platform driver.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>

The current at32ap7000 platform devices aren't declared as supporting DMA,
so that layered drivers can't tell whether they need to manage DMA.

This patch makes all those platform devices report that they support DMA.
Most do, but in a few cases this is inappropriate.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This modifies and extends the existing lcdc platform code to support
the new atmel_lcdfb driver. The ATSTK1000 board code is set up to use
the on-board Samsung LTV350QV LCD panel.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Fix the I/O access macros so that they work with externally connected
devices accessed in little-endian mode over any bus width:

* Use a set of macros to define I/O port- and memory operations
  borrowed from MIPS.
* Allow subarchitecture to specify address- and data-mangling
* Implement at32ap-specific port mangling (with build-time
  configurable bus width. Only one bus width at a time supported
  for now.)
* Rewrite iowriteN and friends to use write[bwl] and friends
  (not the __raw counterparts.)

This has been tested using pata_pcmcia to access a CompactFlash card
connected to the EBI (16-bit bus width.)
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Bring the code that sets the initial PM clock masks in line with the
comment preceding it by only enabling clocks that have users != 0.
Fix SM clock definition and avr32_hpt_init() so that the SM and TC0
clocks keep ticking.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Due to limitation of the count-compare system timer (not able to
count when CPU is in sleep), the system timer had to be changed to
use a peripheral timer/counter.

The old COUNT-COMPARE code is still present in time.c as weak
functions. The new timer is added to the architecture directory.

This patch sets up TC0 as system timer The new timer has been tested
on AT32AP7000/ATSTK1000 at 100 Hz, 250 Hz, 300 Hz and 1000 Hz.

For more details about the timer/counter see the datasheet for
AT32AP700x available at

http://www.atmel.com/dyn/products/product_card.asp?part_id=3903Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Include at32ap-specific Kconfig file from top-level Kconfig file. The
at32ap Kconfig is currently empty, but it will grow some machine-
specific options soon.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Complete the SMC configuration code by adding nwait and tdf
parameter. After this change, we support the same parameters as the
hardware.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This adds register and clock definitions for the High-speed bus Matrix
(HMATRIX) as well as a function that can be used to configure special
EBI functionality like CompactFlash and NAND flash support.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

It's been pointed out that output GPIOs should have an initial value, to
avoid signal glitching ...  among other things, it can be some time before
a driver is ready.  This patch corrects that oversight, fixing

 - documentation
 - platforms supporting the GPIO interface
 - users of that call (just one for now, others are pending)

There's only one user of this call for now since most platforms are still
using non-generic GPIO setup code, which in most cases already couples the
initial value with its "set output mode" request.

Note that most platforms are clear about the hardware letting the output
value be set before the pin direction is changed, but the s3c241x docs are
vague on that topic ...  so those chips might not avoid the glitches.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Acked-by: NAndrew Victor <andrew@sanpeople.com>
Acked-by: NMilan Svoboda <msvoboda@ra.rockwell.com>
Acked-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>