- 03 4月, 2009 1 次提交
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由 Jesse Barnes 提交于
Cleanup some leftovers from the X port. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 02 4月, 2009 13 次提交
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由 Carl Worth 提交于
This is a baby-step in the direction of having finer-grained locking than the struct_mutex. Specifically, this will enable new debugging code to read the active list for printing out GPU state when the GPU is wedged, (while the struct_mutex is held, of course). Signed-off-by: NCarl Worth <cworth@cworth.org> [anholt: indentation fix] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
This brings SDVO TV support from 2D driver, including origin fix f1ca56e17d0 and later fix 2fcf4fcccfe. Also fix wrong modeline definitions for SDVO TV. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
This brings fix commit acde0ef683 from 2D driver. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
This brings fix commit 62c0c2f5549a from 2D driver. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
Fix compile error of intel_sdvo_debug_response(), and explicit use KERN_DEBUG for printk. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
Only set TV DAC in property change seems doesn't work, we have to setup whole crtc pipe which assigned to TV alone. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> [anholt: Note that this should also fix the oops at startup with new 2D] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
If there's no real property change, don't need to set TV mode again. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> [anholt: checkpatch.pl fix] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Arjan van de Ven 提交于
udelay() of 20 milliseconds really ought to just use mdelay(), that avoids the various wrap scenarios and also is more readable Signed-off-by: NArjan van de Ven <arjan@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Jesse Barnes 提交于
Add VGA port hotplug detection to the i915 driver. When KMS is enabled, plugging in or removing a VGA cable from the VGA connector will generate a uevent, which indicates to userspace that it should re-probe outputs on this device (to determine modes, etc.). Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> [anholt: dropped extra PORT_HOTPLUG_STAT clear with ack from jbarnes] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Shaohua Li 提交于
IGD device only has last 1 page used by GTT. This should match the AGP gart code. Signed-off-by: NShaohua Li <shaohua.li@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Ma Ling 提交于
drm_get_edid will store edid into raw_edid, so when freeing edid memory, at the same time clean raw_edid pointer. Signed-off-by: NMa Ling <ling.ma@intel.com> [anholt: Note that raw_edid is not currently used anywhere] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Jesse Barnes 提交于
Indicates something is wrong with the mapping; and apparently triggers in current kernels. Signed-off-by: NJesse Barnes <jbarnes@virtuosugeek.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
This fixes all the tiling problems with the 2d ddx. glxgears still doesn't work. Changes: - fix a copy&paste error in i8xx fence reg setup. It resulted in an at most a 512KB offset of the fence reg window, so was only visible sometimes. - add tests for stride and object size constrains (also for i915 and 1965 class hw). Userspace seems to have an of-by-one bug there, which changes the fence size by at most 512KB due to an overflow. - because i8xx hw is quite old (and therefore not as well-tested) I left 2 debug WARN_ONs in the i8xx fence reg setup code to hopefully catch any further overflows in the bit-fields. Lastly there's one small change to make the alignment checks more consistent. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=20289Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 29 3月, 2009 1 次提交
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由 Dave Airlie 提交于
This produced a warning on my build, not sure why super-warning-man didn't notice this one, its much worse than the %z one. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 28 3月, 2009 25 次提交
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由 Linus Torvalds 提交于
For the fifteen bazillionth time. See also commits f06da264 and aeb565df ("i915: Fix more size_t format string warnings" and "Fix annoying DRM_ERROR() string warning"). Grr-target: Eric Anholt <eric@anholt.net> Grr-target: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Li Peng 提交于
Update bdb_lvds_options structure according to its defination in 2D driver. Then we can parse and set 'lvds_dither' bit correctly on non-965 chips. Signed-off-by: NLi Peng <peng.li@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Chris Wilson 提交于
I've hit the occasional oops inside i915_wait_ring() with an indication of a NULL derefence of dev->primary->master. Adding a NULL check is consistent with the other potential users of dev->primary->master. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
Check that the encoder has a real enabled crtc for TV detect, and fix missing TV type setting after detect. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
Fix TV control save register for untouched bits, and color knobs different definition for 945 and 965 chips. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
The get_modes hook must return the number of modes added. This also fixes TV mode's clock calculation int overflow issue, and use 0.01 precision for mode refresh validation. Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhao Yakui 提交于
This covers: Use long crt hotplug activation time on GM45. Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhao Yakui 提交于
This covers: Limit CRT DAC speed better. and also clears the border color in case it's set to some garbage, which would fix ugly outlines in the blank regions of the CRT. Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> [anholt: replaced *drm_dev with *dev] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
This covers at least: TV: subcarrier fix for NTSC and PAL TV: fix timing parameters for PAL, 480p, 1080i Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Shaohua Li 提交于
This is a G33-like desktop and mobile chipset. Signed-off-by: NShaohua Li <shaohua.li@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Owain G. Ainsworth 提交于
agp_chipset_flush() is for flushing the intel GMCH write cache via the IFP, these two uses are for when we're getting the object into the cpu READ domain, and thus should not be needed. This confused me when I was getting my head around the code. With thanks to airlied for helping me check my mental picture of how the flushes and clflushes are supposed to be used. Signed-off-by: NOwain G. Ainsworth <oga@openbsd.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Chris Wilson 提交于
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
This was inspired by a patch by Chris Wilson, though none of it applied in any way due to the debugfs work and I decided to change the formatting of the new information anyway. Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Ben Gamari 提交于
Here we eliminate a few functions in favor of using a single function to dump from all of the object lists. Signed-Off-By: NBen Gamari <bgamari@gmail.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Ben Gamari 提交于
Signed-off-by: NBen Gamari <bgamari@gmail.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NKeith Packard <keithp@keithp.com>
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由 Eric Anholt 提交于
This introduces allocation in the batch submission path that wasn't there previously, but these are compatibility paths so we care about simplicity more than performance. kernel.org bug #12419. Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NKeith Packard <keithp@keithp.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Eric Anholt 提交于
Like the GTT pwrite path fix, this uses an optimistic path and a fallback to get_user_pages. Note that this means we have to stop using vfs_write and roll it ourselves. Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Eric Anholt 提交于
We've wanted this for a few consumers that touch the pages directly (such as the following commit), which have been doing the refcounting outside of get/put pages. Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Eric Anholt 提交于
Since the pagefault path determines that the lock order we use has to be mmap_sem -> struct_mutex, we can't allow page faults to occur while the struct_mutex is held. To fix this in pwrite, we first try optimistically to see if we can copy from user without faulting. If it fails, fall back to using get_user_pages to pin the user's memory, and map those pages atomically when copying it to the GPU. Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Kristian Høgsberg 提交于
This fixes incorrect detection of the second SDVO/HDMI output on G4X, and extra boot time on pre-G4X. Signed-off-by: NKristian Høgsberg <krh@redhat.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Ma Ling 提交于
This improves the PLL timings according to the suggestion of the hardware engineers. This results in some outputs being able to sync that weren't able to before. This is part of fixing fd.o bug #17508. Signed-off-by: NMa Ling <ling.ma@intel.com> [anholt: cleaned up a couple of redundant comments] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Ma Ling 提交于
The values come from the internal reference spreadsheet on PLL timing limits for the G4X chipsets. Part of fixing fd.o bug #17508 Signed-off-by: NMa Ling <ling.ma@intel.com> [anholt: Cleaned up some whitespace] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Later spec investigation has revealed that every 9xx mobile part has had this register in this format. Also, no non-mobile parts have been shown to have this register. So make all mobile use the same code, and all non-mobile use the hack 965 detection. Signed-off-by: NEric Anholt <eric@anholt.net>
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