1. 31 1月, 2012 4 次提交
  2. 30 1月, 2012 1 次提交
  3. 06 1月, 2012 1 次提交
  4. 05 12月, 2011 1 次提交
    • H
      IMX/SDMA : save the real count for one DMA transaction. · ab59a510
      Huang Shijie 提交于
      When we use the SDMA in the UART driver(such as imx6q), we will
      meet one situation:
        Assume we set 64 bytes for the RX DMA buffer.
        The RX DMA buffer has received some data, but not full.
        An Aging DMA request will be received by the SDMA controller if we enable the
        IDDMAEN(UCR4[6]) in this case.
      
      So the UART driver needs to know the count of the real received bytes,
      and push them to upper layer.
      
      Add two new fields to sdmac, and update the `residue` in sdma_tx_status().
      Signed-off-by: NHuang Shijie <b32955@freescale.com>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      ab59a510
  5. 22 11月, 2011 1 次提交
  6. 01 11月, 2011 1 次提交
  7. 27 10月, 2011 1 次提交
  8. 21 9月, 2011 1 次提交
  9. 29 8月, 2011 3 次提交
  10. 27 7月, 2011 3 次提交
  11. 25 7月, 2011 1 次提交
  12. 07 7月, 2011 1 次提交
    • S
      dmaengine: imx-sdma: pass sdma firmware name via platform data · 2e534b21
      Shawn Guo 提交于
      It is not good to have cpu_name and to_version encoded into sdma
      firmware name as variables.  For example, there are three TOs of
      imx51 soc, the sdma script never changes since TO1, which means
      all three TOs of imx51 uses TO1 version of sdma script.  But we
      have to prepare three identical firmwares, sdma-imx51-to1.bin
      sdma-imx51-to2.bin and sdma-imx51-to3.bin, to have the kernel
      capable of running on all three TOs.
      
      The patch removes cpu_name and to_version from sdma platform data,
      and instead uses fw_name to pass the firmware name, so that we can
      pass the TO version where it's relevant and skip it where only one
      firmware exists.
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      Acked-by: NVinod Koul <vinod.koul@intel.com>
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      2e534b21
  13. 31 1月, 2011 10 次提交
  14. 30 1月, 2011 3 次提交
  15. 08 12月, 2010 1 次提交
  16. 05 12月, 2010 1 次提交
  17. 03 12月, 2010 1 次提交
  18. 06 10月, 2010 1 次提交
    • S
      dmaengine: Add Freescale i.MX SDMA support · 1ec1e82f
      Sascha Hauer 提交于
      This patch adds support for the Freescale i.MX SDMA engine.
      
      The SDMA engine is a scatter/gather DMA engine which is implemented
      as a seperate coprocessor. SDMA needs its own firmware which is
      requested using the standard request_firmware mechanism. The firmware
      has different entry points for each peripheral type, so drivers
      have to pass the peripheral type to the DMA engine which in turn
      picks the correct firmware entry point from a table contained in
      the firmware image itself.
      The original Freescale code also supports support for transfering
      data to the internal SRAM which needs different entry points to
      the firmware. Support for this is currently not implemented. Also,
      support for the ASRC (asymmetric sample rate converter) is skipped.
      
      I took a very simple approach to implement dmaengine support. Only
      a single descriptor is statically assigned to a each channel. This
      means that transfers can't be queued up but only a single transfer
      is in progress. This simplifies implementation a lot and is sufficient
      for the usual device/memory transfers.
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      Reviewed-by: NLinus Walleij <linus.ml.walleij@gmail.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      1ec1e82f