This was leading to a bogus value being programmed to the backend
routing register.
Reviewed-by: NAlex Deucher <alexdeucher@gmail.com>
cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>

On cayman we need to set the bit to cause HDP flushes to invalidate the
HDP cache also.
Reviewed-by: NAlex Deucher <alexdeucher@gmail.com>
cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>

These should be handled by the clear_state setup, but set them
directly as well just to be sure.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Cayman is different enough from evergreen to warrant it's own functions.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Cayman asics have 3 ring buffers:
ring 0 supports both gfx and compute
rings 1 and 2 are compute only

At the moment we only support ring 0.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This patch sets up the gart in legacy mode.  We
probably want to switch to full VM mode at some point.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This may some work to get accel going.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The MC ucode is no longer loaded by the vbios
tables as on previous asics.  It now must be loaded
by the driver.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The MC ucode is no longer loaded by the vbios
tables as on previous asics.  It now must be loaded
by the driver.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>