1. 10 10月, 2017 1 次提交
    • A
      drm/amdgpu: add parameter to allocate high priority contexts v11 · c2636dc5
      Andres Rodriguez 提交于
      Add a new context creation parameter to express a global context priority.
      
      The priority ranking in descending order is as follows:
       * AMDGPU_CTX_PRIORITY_HIGH_HW
       * AMDGPU_CTX_PRIORITY_HIGH_SW
       * AMDGPU_CTX_PRIORITY_NORMAL
       * AMDGPU_CTX_PRIORITY_LOW_SW
       * AMDGPU_CTX_PRIORITY_LOW_HW
      
      The driver will attempt to schedule work to the hardware according to
      the priorities. No latency or throughput guarantees are provided by
      this patch.
      
      This interface intends to service the EGL_IMG_context_priority
      extension, and vulkan equivalents.
      
      Setting a priority above NORMAL requires CAP_SYS_NICE or DRM_MASTER.
      
      v2: Instead of using flags, repurpose __pad
      v3: Swap enum values of _NORMAL _HIGH for backwards compatibility
      v4: Validate usermode priority and store it
      v5: Move priority validation into amdgpu_ctx_ioctl(), headline reword
      v6: add UAPI note regarding priorities requiring CAP_SYS_ADMIN
      v7: remove ctx->priority
      v8: added AMDGPU_CTX_PRIORITY_LOW, s/CAP_SYS_ADMIN/CAP_SYS_NICE
      v9: change the priority parameter to __s32
      v10: split priorities into _SW and _HW
      v11: Allow DRM_MASTER without CAP_SYS_NICE
      Reviewed-by: NEmil Velikov <emil.l.velikov@gmail.com>
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NAndres Rodriguez <andresx7@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      c2636dc5
  2. 25 5月, 2017 1 次提交
    • M
      drm/amdgpu/SRIOV:implement guilty job TDR for(V2) · 65781c78
      Monk Liu 提交于
      1,TDR will kickout guilty job if it hang exceed the threshold
      of the given one from kernel paramter "job_hang_limit", that
      way a bad command stream will not infinitly cause GPU hang.
      
      by default this threshold is 1 so a job will be kicked out
      after it hang.
      
      2,if a job timeout TDR routine will not reset all sched/ring,
      instead if will only reset on the givn one which is indicated
      by @job of amdgpu_sriov_gpu_reset, that way we don't need to
      reset and recover each sched/ring if we already know which job
      cause GPU hang.
      
      3,unblock sriov_gpu_reset for AI family.
      
      V2:
      1:put kickout guilty job after sched parked.
      2:since parking scheduler prior to kickout already occupies a
      while, we can do last check on the in question job before
      doing hw_reset.
      
      TODO:
      1:when a job is considered as guilty, we should mark some flag
      in its fence status flag, and let UMD side aware that this
      fence signaling is not due to job complete but job hang.
      
      2:if gpu reset cause all video memory lost, we need introduce
      a new policy to implement TDR, like drop all jobs not yet
      signaled, and all IOCTL on this device will return ERROR
      DEVICE_LOST.
      this will be implemented later.
      Signed-off-by: NMonk Liu <Monk.Liu@amd.com>
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      65781c78
  3. 11 5月, 2017 1 次提交
  4. 30 3月, 2017 2 次提交
  5. 01 11月, 2016 1 次提交
  6. 25 10月, 2016 1 次提交
    • C
      dma-buf: Rename struct fence to dma_fence · f54d1867
      Chris Wilson 提交于
      I plan to usurp the short name of struct fence for a core kernel struct,
      and so I need to rename the specialised fence/timeline for DMA
      operations to make room.
      
      A consensus was reached in
      https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html
      that making clear this fence applies to DMA operations was a good thing.
      Since then the patch has grown a bit as usage increases, so hopefully it
      remains a good thing!
      
      (v2...: rebase, rerun spatch)
      v3: Compile on msm, spotted a manual fixup that I broke.
      v4: Try again for msm, sorry Daniel
      
      coccinelle script:
      @@
      
      @@
      - struct fence
      + struct dma_fence
      @@
      
      @@
      - struct fence_ops
      + struct dma_fence_ops
      @@
      
      @@
      - struct fence_cb
      + struct dma_fence_cb
      @@
      
      @@
      - struct fence_array
      + struct dma_fence_array
      @@
      
      @@
      - enum fence_flag_bits
      + enum dma_fence_flag_bits
      @@
      
      @@
      (
      - fence_init
      + dma_fence_init
      |
      - fence_release
      + dma_fence_release
      |
      - fence_free
      + dma_fence_free
      |
      - fence_get
      + dma_fence_get
      |
      - fence_get_rcu
      + dma_fence_get_rcu
      |
      - fence_put
      + dma_fence_put
      |
      - fence_signal
      + dma_fence_signal
      |
      - fence_signal_locked
      + dma_fence_signal_locked
      |
      - fence_default_wait
      + dma_fence_default_wait
      |
      - fence_add_callback
      + dma_fence_add_callback
      |
      - fence_remove_callback
      + dma_fence_remove_callback
      |
      - fence_enable_sw_signaling
      + dma_fence_enable_sw_signaling
      |
      - fence_is_signaled_locked
      + dma_fence_is_signaled_locked
      |
      - fence_is_signaled
      + dma_fence_is_signaled
      |
      - fence_is_later
      + dma_fence_is_later
      |
      - fence_later
      + dma_fence_later
      |
      - fence_wait_timeout
      + dma_fence_wait_timeout
      |
      - fence_wait_any_timeout
      + dma_fence_wait_any_timeout
      |
      - fence_wait
      + dma_fence_wait
      |
      - fence_context_alloc
      + dma_fence_context_alloc
      |
      - fence_array_create
      + dma_fence_array_create
      |
      - to_fence_array
      + to_dma_fence_array
      |
      - fence_is_array
      + dma_fence_is_array
      |
      - trace_fence_emit
      + trace_dma_fence_emit
      |
      - FENCE_TRACE
      + DMA_FENCE_TRACE
      |
      - FENCE_WARN
      + DMA_FENCE_WARN
      |
      - FENCE_ERR
      + DMA_FENCE_ERR
      )
       (
       ...
       )
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
      Acked-by: NSumit Semwal <sumit.semwal@linaro.org>
      Acked-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
      f54d1867
  7. 08 7月, 2016 11 次提交
  8. 12 5月, 2016 1 次提交
  9. 05 5月, 2016 1 次提交
  10. 03 5月, 2016 6 次提交
  11. 03 12月, 2015 1 次提交
  12. 24 11月, 2015 1 次提交
  13. 17 11月, 2015 2 次提交
  14. 15 10月, 2015 1 次提交
  15. 24 9月, 2015 6 次提交
  16. 29 8月, 2015 1 次提交
  17. 27 8月, 2015 2 次提交