“a74022a55e44fe2044ac3660452cafecb300aece”上不存在“arch/arm/mach-s3c24xx/mach-smdk2413.c”
  1. 30 5月, 2017 1 次提交
  2. 06 4月, 2017 1 次提交
  3. 04 4月, 2017 1 次提交
    • A
      powerpc/powernv: Introduce address translation services for Nvlink2 · 1ab66d1f
      Alistair Popple 提交于
      Nvlink2 supports address translation services (ATS) allowing devices
      to request address translations from an mmu known as the nest MMU
      which is setup to walk the CPU page tables.
      
      To access this functionality certain firmware calls are required to
      setup and manage hardware context tables in the nvlink processing unit
      (NPU). The NPU also manages forwarding of TLB invalidates (known as
      address translation shootdowns/ATSDs) to attached devices.
      
      This patch exports several methods to allow device drivers to register
      a process id (PASID/PID) in the hardware tables and to receive
      notification of when a device should stop issuing address translation
      requests (ATRs). It also adds a fault handler to allow device drivers
      to demand fault pages in.
      Signed-off-by: NAlistair Popple <alistair@popple.id.au>
      [mpe: Fix up comment formatting, use flush_tlb_mm()]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      1ab66d1f
  4. 28 3月, 2017 1 次提交
  5. 04 3月, 2017 1 次提交
    • A
      powerpc/powernv: Fix opal tracepoints with JUMP_LABEL=n · 2a9c4f40
      Alexey Kardashevskiy 提交于
      The recent commit to allow calling OPAL calls in real mode, commit
      ab9bad0e ("powerpc/powernv: Remove separate entry for OPAL real mode
      calls"), introduced a bug when CONFIG_JUMP_LABEL=n.
      
      The commit moved the "mfmsr r12" prior to the call to OPAL_BRANCH, but
      we missed that OPAL_BRANCH clobbers r12 when jump labels are disabled.
      This leads to us using the tracepoint refcount as the MSR value,
      typically zero, and saving that into PACASAVEDMSR. When we return from
      OPAL we use that value as the MSR value for rfid, meaning we switch to
      32-bit BE real mode - hilarity ensues.
      
      Fix it by using r11 in OPAL_BRANCH, which is not live at the time the
      macro is used in OPAL_CALL.
      
      Fixes: ab9bad0e ("powerpc/powernv: Remove separate entry for OPAL real mode calls")
      Suggested-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      2a9c4f40
  6. 10 2月, 2017 1 次提交
    • M
      powerpc/powernv: Fix opal_exit tracepoint opcode · a7e0fb6c
      Michael Ellerman 提交于
      Currently the opal_exit tracepoint usually shows the opcode as 0:
      
        <idle>-0     [047] d.h.   635.654292: opal_entry: opcode=63
        <idle>-0     [047] d.h.   635.654296: opal_exit: opcode=0 retval=0
        kopald-1209  [019] d...   636.420943: opal_entry: opcode=10
        kopald-1209  [019] d...   636.420959: opal_exit: opcode=0 retval=0
      
      This is because we incorrectly load the opcode into r0 before calling
      __trace_opal_exit(), whereas it expects the opcode in r3 (first function
      parameter). In fact we are leaving the retval in r3, so opcode and
      retval will always show the same value.
      
      Instead load the opcode into r3, resulting in:
      
        <idle>-0     [040] d.h.   636.618625: opal_entry: opcode=63
        <idle>-0     [040] d.h.   636.618627: opal_exit: opcode=63 retval=0
      
      Fixes: c49f6353 ("powernv: Add OPAL tracepoints")
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      a7e0fb6c
  7. 07 2月, 2017 1 次提交
  8. 30 1月, 2017 1 次提交
    • A
      powerpc/powernv: Initialise nest mmu · 1d0761d2
      Alistair Popple 提交于
      POWER9 contains an off core mmu called the nest mmu (NMMU). This is
      used by other hardware units on the chip to translate virtual
      addresses into real addresses. The unit attempting an address
      translation provides the majority of the context required for the
      translation request except for the base address of the partition table
      (ie. the PTCR) which needs to be programmed into the NMMU.
      
      This patch adds a call to OPAL to set the PTCR for the nest mmu in
      opal_init().
      Signed-off-by: NAlistair Popple <alistair@popple.id.au>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      1d0761d2
  9. 23 11月, 2016 1 次提交
  10. 12 9月, 2016 1 次提交
    • P
      KVM: PPC: Book3S HV: Set server for passed-through interrupts · 5d375199
      Paul Mackerras 提交于
      When a guest has a PCI pass-through device with an interrupt, it
      will direct the interrupt to a particular guest VCPU.  In fact the
      physical interrupt might arrive on any CPU, and then get
      delivered to the target VCPU in the emulated XICS (guest interrupt
      controller), and eventually delivered to the target VCPU.
      
      Now that we have code to handle device interrupts in real mode
      without exiting to the host kernel, there is an advantage to having
      the device interrupt arrive on the same sub(core) as the target
      VCPU is running on.  In this situation, the interrupt can be
      delivered to the target VCPU without any exit to the host kernel
      (using a hypervisor doorbell interrupt between threads if
      necessary).
      
      This patch aims to get passed-through device interrupts arriving
      on the correct core by setting the interrupt server in the real
      hardware XICS for the interrupt to the first thread in the (sub)core
      where its target VCPU is running.  We do this in the real-mode H_EOI
      code because the H_EOI handler already needs to look at the
      emulated ICS state for the interrupt (whereas the H_XIRR handler
      doesn't), and we know we are running in the target VCPU context
      at that point.
      
      We set the server CPU in hardware using an OPAL call, regardless of
      what the IRQ affinity mask for the interrupt says, and without
      updating the affinity mask.  This amounts to saying that when an
      interrupt is passed through to a guest, as a matter of policy we
      allow the guest's affinity for the interrupt to override the host's.
      
      This is inspired by an earlier patch from Suresh Warrier, although
      none of this code came from that earlier patch.
      Signed-off-by: NPaul Mackerras <paulus@ozlabs.org>
      5d375199
  11. 17 7月, 2016 1 次提交
  12. 15 7月, 2016 1 次提交
  13. 29 6月, 2016 1 次提交
  14. 21 6月, 2016 1 次提交
  15. 20 6月, 2016 1 次提交
    • M
      powerpc/powernv: Remove the usage of PACAR1 from opal wrappers · 6dd06d15
      Mahesh Salgaonkar 提交于
      OPAL_CALL wrapper code sticks the r1 (stack pointer) into PACAR1 purely
      for debugging purpose only. The power7_wakeup* functions relies on stack
      pointer saved in PACAR1. Any opal call made using opal wrapper (directly
      or in-directly) before we fall through power7_wakeup*, then it ends up
      replacing r1 in PACAR1(r13) leading to kernel panic. So far we don't see
      any issues because we have never made any opal calls using OPAL wrapper
      before power7_wakeup*. But the subsequent HMI patch would need to invoke
      C calls during cpu wakeup/idle path that in-directly makes opal call using
      opal wrapper. This patch facilitates the subsequent HMI patch by removing
      usage of PACAR1 from opal call wrapper.
      Signed-off-by: NMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Acked-by: NMichael Ellerman <mpe@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@ozlabs.org>
      6dd06d15
  16. 27 12月, 2015 1 次提交
    • R
      powerpc/powernv: Add a kmsg_dumper that flushes console output on panic · affddff6
      Russell Currey 提交于
      On BMC machines, console output is controlled by the OPAL firmware and is
      only flushed when its pollers are called.  When the kernel is in a panic
      state, it no longer calls these pollers and thus console output does not
      completely flush, causing some output from the panic to be lost.
      
      Output is only actually lost when the kernel is configured to not power off
      or reboot after panic (i.e. CONFIG_PANIC_TIMEOUT is set to 0) since OPAL
      flushes the console buffer as part of its power down routines.  Before this
      patch, however, only partial output would be printed during the timeout wait.
      
      This patch adds a new kmsg_dumper which gets called at panic time to ensure
      panic output is not lost.  It accomplishes this by calling OPAL_CONSOLE_FLUSH
      in the OPAL API, and if that is not available, the pollers are called enough
      times to (hopefully) completely flush the buffer.
      
      The flushing mechanism will only affect output printed at and before the
      kmsg_dump call in kernel/panic.c:panic().  As such, the "end Kernel panic"
      message may still be truncated as follows:
      
      >Call Trace:
      >[c000000f1f603b00] [c0000000008e9458] dump_stack+0x90/0xbc (unreliable)
      >[c000000f1f603b30] [c0000000008e7e78] panic+0xf8/0x2c4
      >[c000000f1f603bc0] [c000000000be4860] mount_block_root+0x288/0x33c
      >[c000000f1f603c80] [c000000000be4d14] prepare_namespace+0x1f4/0x254
      >[c000000f1f603d00] [c000000000be43e8] kernel_init_freeable+0x318/0x350
      >[c000000f1f603dc0] [c00000000000bd74] kernel_init+0x24/0x130
      >[c000000f1f603e30] [c0000000000095b0] ret_from_kernel_thread+0x5c/0xac
      >---[ end Kernel panic - not
      
      This functionality is implemented as a kmsg_dumper as it seems to be the
      most sensible way to introduce platform-specific functionality to the
      panic function.
      Signed-off-by: NRussell Currey <ruscur@russell.cc>
      Reviewed-by: NAndrew Donnellan <andrew.donnellan@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      affddff6
  17. 20 8月, 2015 1 次提交
  18. 06 8月, 2015 1 次提交
  19. 16 7月, 2015 1 次提交
  20. 05 6月, 2015 1 次提交
  21. 22 5月, 2015 1 次提交
    • S
      powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior · 5703d2f4
      Shreyas B. Prabhu 提交于
      Fastsleep is one of the idle state which cpuidle subsystem currently
      uses on power8 machines. In this state L2 cache is brought down to a
      threshold voltage. Therefore when the core is in fastsleep, the
      communication between L2 and L3 needs to be fenced. But there is a bug
      in the current power8 chips surrounding this fencing.
      
      OPAL provides a workaround which precludes the possibility of hitting
      this bug. But running with this workaround applied causes checkstop
      if any correctable error in L2 cache directory is detected. Hence OPAL
      also provides a way to undo the workaround.
      
      In the existing implementation, workaround is applied by the last thread
      of the core entering fastsleep and undone by the first thread waking up.
      But this has a performance cost. These OPAL calls account for roughly
      4000 cycles everytime the core has to enter or wakeup from fastsleep.
      
      This patch introduces a sysfs attribute (fastsleep_workaround_applyonce)
      to choose the behavior of this workaround.
      
      By default, fastsleep_workaround_applyonce = 0. In this case, workaround
      is applied/undone everytime the core enters/exits fastsleep.
      
      fastsleep_workaround_applyonce = 1. In this case the workaround is
      applied once on all the cores and never undone. This can be triggered by
      echo 1 > /sys/devices/system/cpu/fastsleep_workaround_applyonce
      
      For simplicity this attribute can be modified only once. Implying, once
      fastsleep_workaround_applyonce is changed to 1, it cannot be reverted
      to the default state.
      Signed-off-by: NShreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
      Reviewed-by: NPreeti U Murthy <preeti@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      5703d2f4
  22. 11 4月, 2015 1 次提交
  23. 09 4月, 2015 1 次提交
  24. 16 3月, 2015 1 次提交
    • M
      powerpc/powernv: Move opal-api.h closer to the Skiboot version · d7cf83fc
      Michael Ellerman 提交于
      This commit gets opal-api.h to mostly match the version in Skiboot as of
      commit ea7d806ab0ba.
      
      The exceptions are things which are not (currently) used in Linux.
      
      Most of this is just whitespace and a few things moving around. I think
      the diff is readable.
      
      Also OpalMessageType became opal_msg_type, requiring a change in the
      Linux code.
      
      Finally Skiboot and Linux disagree on CAPI vs CXL, because CAPI means
      something else in Linux. To handle that we just point the Linux wrapper,
      which is named "cxl" to the OPAL token OPAL_PCI_SET_PHB_CAPI_MODE.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      Reviewed-by: NStewart Smith <stewart@linux.vnet.ibm.com>
      d7cf83fc
  25. 12 1月, 2015 1 次提交
    • A
      powernv: Fix OPAL tracepoint code · bfe5fda8
      Anton Blanchard 提交于
      Patch c49f6353 ("powernv: Add OPAL tracepoints") has a spurious
      store to the stack:
      
      	ld      r12,opal_tracepoint_refcount@toc(r2);           \
      	std     r12,32(r1);                                     \
      
      The store was originally used to save the current tracepoint status
      so the entry and the exit tracepoints were always balanced. In the
      end I just created a separate path when tracepoints are enabled.
      
      The offset on the stack used for this store is not valid for ABIv2
      and it causes strange issues. I noticed it because OPAL console input
      was broken.
      
      Fixes: c49f6353 ("powernv: Add OPAL tracepoints")
      Cc: <stable@vger.kernel.org> # v3.17+
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      bfe5fda8
  26. 15 12月, 2014 2 次提交
    • S
      powernv/powerpc: Add winkle support for offline cpus · 77b54e9f
      Shreyas B. Prabhu 提交于
      Winkle is a deep idle state supported in power8 chips. A core enters
      winkle when all the threads of the core enter winkle. In this state
      power supply to the entire chiplet i.e core, private L2 and private L3
      is turned off. As a result it gives higher powersavings compared to
      sleep.
      
      But entering winkle results in a total hypervisor state loss. Hence the
      hypervisor context has to be preserved before entering winkle and
      restored upon wake up.
      
      Power-on Reset Engine (PORE) is a dedicated engine which is responsible
      for powering on the chiplet during wake up. It can be programmed to
      restore the register contests of a few specific registers. This patch
      uses PORE to restore register state wherever possible and uses stack to
      save and restore rest of the necessary registers.
      
      With hypervisor state restore things fall under three categories-
      per-core state, per-subcore state and per-thread state. To manage this,
      extend the infrastructure introduced for sleep. Mainly we add a paca
      variable subcore_sibling_mask. Using this and the core_idle_state we can
      distingush first thread in core and subcore.
      Signed-off-by: NShreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: linuxppc-dev@lists.ozlabs.org
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      77b54e9f
    • S
      powernv/cpuidle: Redesign idle states management · 7cba160a
      Shreyas B. Prabhu 提交于
      Deep idle states like sleep and winkle are per core idle states. A core
      enters these states only when all the threads enter either the
      particular idle state or a deeper one. There are tasks like fastsleep
      hardware bug workaround and hypervisor core state save which have to be
      done only by the last thread of the core entering deep idle state and
      similarly tasks like timebase resync, hypervisor core register restore
      that have to be done only by the first thread waking up from these
      state.
      
      The current idle state management does not have a way to distinguish the
      first/last thread of the core waking/entering idle states. Tasks like
      timebase resync are done for all the threads. This is not only is
      suboptimal, but can cause functionality issues when subcores and kvm is
      involved.
      
      This patch adds the necessary infrastructure to track idle states of
      threads in a per-core structure. It uses this info to perform tasks like
      fastsleep workaround and timebase resync only once per core.
      Signed-off-by: NShreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
      Originally-by: NPreeti U. Murthy <preeti@linux.vnet.ibm.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: linux-pm@vger.kernel.org
      Cc: linuxppc-dev@lists.ozlabs.org
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      7cba160a
  27. 14 12月, 2014 1 次提交
  28. 17 11月, 2014 1 次提交
    • N
      rtc/tpo: Driver to support rtc and wakeup on PowerNV platform · 16b1d26e
      Neelesh Gupta 提交于
      The patch implements the OPAL rtc driver that binds with the rtc
      driver subsystem. The driver uses the platform device infrastructure
      to probe the rtc device and register it to rtc class framework. The
      'wakeup' is supported depending upon the property 'has-tpo' present
      in the OF node. It provides a way to load the generic rtc driver in
      in the absence of an OPAL driver.
      
      The patch also moves the existing OPAL rtc get/set time interfaces to the
      new driver and exposes the necessary OPAL calls using EXPORT_SYMBOL_GPL.
      
      Test results:
      -------------
      Host:
      [root@tul169p1 ~]# ls -l /sys/class/rtc/
      total 0
      lrwxrwxrwx 1 root root 0 Oct 14 03:07 rtc0 -> ../../devices/opal-rtc/rtc/rtc0
      [root@tul169p1 ~]# cat /sys/devices/opal-rtc/rtc/rtc0/time
      08:10:07
      [root@tul169p1 ~]# echo `date '+%s' -d '+ 2 minutes'` > /sys/class/rtc/rtc0/wakealarm
      [root@tul169p1 ~]# cat /sys/class/rtc/rtc0/wakealarm
      1413274345
      [root@tul169p1 ~]#
      
      FSP:
      $ smgr mfgState
      standby
      $ rtim timeofday
      
      System time is valid: 2014/10/14 08:12:04.225115
      
      $ smgr mfgState
      ipling
      $
      
      CC: devicetree@vger.kernel.org
      CC: tglx@linutronix.de
      CC: rtc-linux@googlegroups.com
      CC: a.zummo@towertech.it
      Signed-off-by: NNeelesh Gupta <neelegup@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      16b1d26e
  29. 12 11月, 2014 1 次提交
  30. 10 11月, 2014 1 次提交
  31. 23 10月, 2014 1 次提交
    • J
      powernv: Use _GLOBAL_TOC for opal wrappers · 19d36c21
      Jeremy Kerr 提交于
      Currently, we can't call opal wrappers from modules when using the LE
      ABIv2, which requires a TOC init. If we do we'll try and load the opal
      entry point using the wrong toc and probably explode or worse jump to
      the wrong address.
      
      Nothing in upstream is making opal calls from a module, but we do export
      one of the wrappers so we should fix this anyway.
      
      This change uses the _GLOBAL_TOC() macro (rather than _GLOBAL) for the
      opal wrappers, so that we can do non-local calls to them.
      Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      19d36c21
  32. 08 10月, 2014 1 次提交
  33. 30 9月, 2014 1 次提交
  34. 25 9月, 2014 1 次提交
  35. 13 8月, 2014 1 次提交
  36. 05 8月, 2014 2 次提交
  37. 11 7月, 2014 1 次提交
    • A
      powernv: Add OPAL tracepoints · c49f6353
      Anton Blanchard 提交于
      Knowing how long we spend in firmware calls is an important part of
      minimising OS jitter.
      
      This patch adds tracepoints to each OPAL call. If tracepoints are
      enabled we branch out to a common routine that calls an entry and exit
      tracepoint.
      
      This allows us to write tools that monitor the frequency and duration
      of OPAL calls, eg:
      
      name                  count  total(ms)  min(ms)  max(ms)  avg(ms)  period(ms)
      OPAL_HANDLE_INTERRUPT     5      0.199    0.037    0.042    0.040   12547.545
      OPAL_POLL_EVENTS        204      2.590    0.012    0.036    0.013    2264.899
      OPAL_PCI_MSI_EOI       2830      3.066    0.001    0.005    0.001      81.166
      
      We use jump labels if configured, which means we only add a single
      nop instruction to every OPAL call when the tracepoints are disabled.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c49f6353
  38. 05 6月, 2014 1 次提交