Platform data for device drivers should be defined in
include/linux/platform_data/*.h, not in the architecture
and platform specific directories.

This moves such data out of the orion include directories
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <djbw@fb.com>
Cc: Bryan Wu <bryan.wu@canonical.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Chris Ball <cjb@laptop.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Liam Girdwood <lrg@ti.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.de>

Let the machine pass to the platform which clock is used by the uart.
Enable the clock and use clk_get_rate() to determine its rate.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NJamie Lentin <jm@lentin.co.uk>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The t_clk is moved from the shared part of the ethernet driver into
the per port section. Each port can have its own gated clock, which it
needs to enable/disable, as oppossed to there being one clock shared
by all ports. In practice, only kirkwood supports this at the moment.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NJamie Lentin <jm@lentin.co.uk>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Remove now redundant tclk from SPI platform data. This makes the platform
data empty, so remove it.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NJamie Lentin <jm@lentin.co.uk>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Add tclk as a fixed rate clock for all platforms. In addition, on
kirkwood, add a gated clock for most of the clocks which can be gated.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NJamie Lentin <jm@lentin.co.uk>
[mturquette@linaro.org: removed redundant CLKDEV_LOOKUP from Kconfig]
[mturquette@linaro.org: removed redundant clk.h from mach-dove/common.c]
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The patch "ARM: orion: Consolidate USB platform setup code.", commit
4fcd3f37 broke USB on TS-7800 and
other orion5x boards, because the wrong type of PHY was being passed
to the EHCI driver in the platform data. Orion5x needs EHCI_PHY_ORION
and all the others want EHCI_PHY_NA.

Allow the mach- code to tell the generic plat-orion code which USB PHY
enum to place into the platform data.

Version 2: Rebase to v3.3-rc2.
Reported-by: NAmbroz Bizjak <ambrop7@gmail.com>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NAmbroz Bizjak <ambrop7@gmail.com>
Acked-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Hook these platforms restart code into the new restart hook rather than
using arch_reset().
Acked-by: NNicolas pitre <nico@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NMichael Walle <michael@walle.cc>
Acked-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Move the *_mbus_dram_info structure into the orion platform and call it
orion_mbus_dram_info everywhere.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NMichael Walle <michael@walle.cc>
Acked-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Changing eg 0xffffffff to DMA_BIT_MASK(32) etc allows easier
side by side comparision of identical code which can be consolidated.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

This patch makes the various mach dirs that use the plat-orion time
code pass in timer and bridge addresses explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Since commit eb0519b5, mv643xx_eth is non functional on ARM because
the platform device declaration does not include any coherent DMA mask
and coherent memory allocations fail.
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Remove explicit names from platform device resources since they will
automatically be named after the platform device they're associated
with.
Signed-off-by: NMartin Michlmayr <tbm@cyrius.com>
Acked-by: NRussell King <linux@arm.linux.org.uk>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Symbols like SOFT_RESET are way too generic to be exported at large.
To avoid this, let's move the mbus bridge register defines into a
separate file and include it where needed.  This affects mach-kirkwood,
mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all
share code in plat-orion which relies on those defines.

Some other defines have been moved to narrower scopes, or simply deleted
when they had no user.

This fixes compilation problem with mpt2sas on the above listed
platforms.
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

All the pieces were ready, just matter of assembling
them together.
Signed-off-by: NRiku Voipio <riku.voipio@iki.fi>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

On pre-A0 revisions of the mv78xx0 SoC, the third and fourth
ethernet interface are not brought out to pins, but are internally
cross-connected, so if we run on pre-A0 silicon, we'll force eth2
and eth3 to PHYless mode.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>

During boot, identify which chip stepping we're running on (determined
by looking at the first PCIe unit's device ID and revision registers),
and print a message with the details about what we found.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>

The Orion ehci driver serves the Orion, kirkwood and DD Soc families.
Since each of those integrate a different USB phy we should have the
ability to use few initialization sequences or to leave the boot loader
phy settings as is.
Signed-off-by: NRonen Shitrit <rshitrit@marvell.com>

Wire up the ethernet port's error interrupt so that the
mv643xx_eth driver can sleep for SMI event completion instead of
having to busy-wait for it.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Which top-level unit's SMI interface to use should be a property of
the top-level unit, not of the individual ports.  This patch moves the
->shared_smi pointer from the per-port platform data to the global
platform data.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>

This patch performs the equivalent include directory shuffle for
plat-orion, and fixes up all users.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.

This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.
Signed-off-by: NStanislav Samsonov <samsonov@marvell.com>
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>