1. 19 9月, 2012 1 次提交
  2. 05 1月, 2012 1 次提交
  3. 22 8月, 2011 1 次提交
  4. 04 3月, 2011 1 次提交
  5. 20 10月, 2010 1 次提交
    • N
      arm: remove machine_desc.io_pg_offst and .phys_io · 6451d778
      Nicolas Pitre 提交于
      Since we're now using addruart to establish the debug mapping, we can
      remove the io_pg_offst and phys_io members of struct machine_desc.
      
      The various declarations were removed using the following script:
      
        grep -rl MACHINE_START arch/arm | xargs \
        sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'
      
      [ Initial patch was from Jeremy Kerr, example script from Russell King ]
      Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
      Acked-by: Eric Miao <eric.miao at canonical.com>
      6451d778
  6. 17 7月, 2010 2 次提交
  7. 09 6月, 2009 1 次提交
  8. 27 2月, 2009 4 次提交
  9. 26 9月, 2008 1 次提交
  10. 05 9月, 2008 1 次提交
    • L
      mv643xx_eth: remove force_phy_addr field · ac840605
      Lennert Buytenhek 提交于
      Currently, there are two different fields in the
      mv643xx_eth_platform_data struct that together describe the PHY
      address -- one field (phy_addr) has the address of the PHY, but if
      that address is zero, a second field (force_phy_addr) needs to be
      set to distinguish the actual address zero from a zero due to not
      having filled in the PHY address explicitly (which should mean
      'use the default PHY address').
      
      If we are a bit smarter about the encoding of the phy_addr field,
      we can avoid the need for a second field -- this patch does that.
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      ac840605
  11. 07 8月, 2008 1 次提交
  12. 23 6月, 2008 1 次提交
    • S
      [ARM] add Marvell Kirkwood (88F6000) SoC support · 651c74c7
      Saeed Bishara 提交于
      The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
      Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
      a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
      interface, and IDMA/XOR engines, and depending on the model, also
      features one or two Gigabit Ethernet interfaces, two SATA II
      interfaces, one or two TWSI interfaces, one or two UARTs, a
      TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
      an SDIO interface.
      
      This patch adds supports for the Marvell DB-88F6281-BP Development
      Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
      enabling support for the PCIe interface, the USB interface, the
      ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
      UARTs, and the NAND controller.
      Signed-off-by: NSaeed Bishara <saeed@marvell.com>
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      651c74c7