1. 14 12月, 2013 2 次提交
    • P
      drm/i915: get a PC8 reference when enabling the power well · be3d26b0
      Paulo Zanoni 提交于
      In the current code, at haswell_modeset_global_resources, first we
      decide if we want to enable/disable the power well, then we decide if
      we want to enable/disable PC8. On the case where we're enabling PC8
      this works fine, but on the case where we disable PC8 due to a non-eDP
      monitor being enabled, we first enable the power well and then disable
      PC8. Although wrong, this doesn't seem to be causing any problems now,
      and we don't even see anything in dmesg. But the patches for runtime
      D3 turn this problem into a real bug, so we need to fix it.
      
      This fixes the "modeset-non-lpsp" subtest from the "pm_pc8" test from
      intel-gpu-tools.
      
      v2: - Rebase (i915_disable_power_well).
      v3: - More reabase.
      v4: - Rebase on top of -fixes instead of -nightly.
      
      This is commit d62292c8 in -next, but
      we need it in -fixes to address Dave's report.
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NRodrigo Vivi <rodrigo.vivi@gmail.com>
      Reported-by: NDave Jones <davej@redhat.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      be3d26b0
    • P
      drm/i915: change CRTC assertion on LCPLL disable · 96b40268
      Paulo Zanoni 提交于
      Currently, PC8 is enabled at modeset_global_resources, which is called
      after intel_modeset_update_state. Due to this, there's a small race
      condition on the case where we start enabling PC8, then do a modeset
      while PC8 is still being enabled. The racing condition triggers a WARN
      because intel_modeset_update_state will mark the CRTC as enabled, then
      the thread that's still enabling PC8 might look at the data structure
      and think that PC8 is being enabled while a pipe is enabled. Despite
      the WARN, this is not really a bug since we'll wait for the
      PC8-enabling thread to finish when we call modeset_global_resources.
      
      The spec says the CRTC cannot be enabled when we disable LCPLL, so we
      had a check for crtc->base.enabled. If we change to crtc->active we
      will still prevent disabling LCPLL while the CRTC is enabled, and we
      will also prevent the WARN above.
      
      This is a replacement for the previous patch named
          "drm/i915: get/put PC8 when we get/put a CRTC"
      
      Testcase: igt/pm_pc8/modeset-lpsp-stress-no-wait
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      (cherry picked from commit 798183c5
      from -next due to Dave's report.)
      Reported-by: NDave Jones <davej@redhat.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      96b40268
  2. 12 12月, 2013 5 次提交
    • C
      drm/i915: Fix erroneous dereference of batch_obj inside reset_status · 4db080f9
      Chris Wilson 提交于
      As the rings may be processed and their requests deallocated in a
      different order to the natural retirement during a reset,
      
      /* Whilst this request exists, batch_obj will be on the
       * active_list, and so will hold the active reference. Only when this
       * request is retired will the the batch_obj be moved onto the
       * inactive_list and lose its active reference. Hence we do not need
       * to explicitly hold another reference here.
       */
      
      is violated, and the batch_obj may be dereferenced after it had been
      freed on another ring. This can be simply avoided by processing the
      status update prior to deallocating any requests.
      
      Fixes regression (a possible OOPS following a GPU hang) from
      commit aa60c664
      Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Date:   Wed Jun 12 15:13:20 2013 +0300
      
          drm/i915: find guilty batch buffer on ring resets
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: stable@vger.kernel.org
      Reviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      [danvet: Add the code comment Chris supplied.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4db080f9
    • C
      drm/i915: Prevent double unref following alloc failure during execbuffer · 9ae9ab52
      Chris Wilson 提交于
      Whilst looking up the objects required for an execbuffer, an untimely
      allocation failure in creating the vma results in the object being
      unreferenced from two lists. The ownership during the lookup is meant to
      be moved from the list of objects being looked to the vma, and this
      double unreference upon error results in a use-after-free.
      
      Fixes regression from
      commit 27173f1f
      Author: Ben Widawsky <ben@bwidawsk.net>
      Date:   Wed Aug 14 11:38:36 2013 +0200
      
          drm/i915: Convert execbuf code to use vmas
      
      Based on the fix by Ben Widawsky.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Ben Widawsky <ben@bwidawsk.net>
      Cc: stable@vger.kernel.org
      [danvet: Bikeshed the crucial comment above the ownership transfer as
      discussed on irc.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      9ae9ab52
    • D
      Merge branch 'drm-tda998x-3.12-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox into drm-fixes · 5c015db7
      Dave Airlie 提交于
      These four patches fix a few issues discovered since the initial merge,
      which have been reviewed by Rob Clark and Thierry Reding.
      
      * 'drm-tda998x-3.12-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox:
        DRM: Armada: prime refcounting bug fix
        DRM: Armada: fix printing of phys_addr_t/dma_addr_t
        DRM: Armada: destroy framebuffer after helper
        DRM: Armada: implement lastclose() for fbhelper
      5c015db7
    • D
      Merge tag 'drm-intel-fixes-2013-12-11' of... · 25945b66
      Dave Airlie 提交于
      Merge tag 'drm-intel-fixes-2013-12-11' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes
      
      Just a bunch of regression fixes plus a few patches for long-standing
      issues in gem corner-cases that we've hunted down in the past weeks. Since
      apparently people hit those in the wild (and we also have nice igts for
      them) I've opted for -fixes and cc: stable.
      
      There's 1-2 things oustanding on top of this where I'm still waiting on
      confirmation from testing, but nothing really scary.
      
      * tag 'drm-intel-fixes-2013-12-11' of git://people.freedesktop.org/~danvet/drm-intel:
        drm/i915: don't update the dri1 breadcrumb with modesetting
        drm/i915: Repeat eviction search after idling the GPU
        drm/i915: Fix use-after-free in do_switch
        drm/i915: fix pm init ordering
        drm/i915: Hold mutex across i915_gem_release
        drm/i915: Skip clock checks on BDW
        drm/i915: Do not clobber config status after a forced restore of hw state
        drm/i915: Take modeset locks around intel_modeset_setup_hw_state()
      25945b66
    • D
      Merge branch 'bdw-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes · 62a3a126
      Dave Airlie 提交于
      As promised bdw fixes come separate for now. Just a few minior things.
      
      * 'bdw-fixes' of git://people.freedesktop.org/~danvet/drm-intel:
        drm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwell
        drm/i915/bdw: Limit GTT to 2GB
        drm/i915/bdw: Add comment about gen8 HWS PGA
        drm/i915/bdw: Free correct number of ppgtt pages
        drm/i915/bdw: Do gen6 style reset for gen8
        drm/i915/bdw: GEN8 backlight support
        drm/i915/bdw: Add BDW to ULT macro
      62a3a126
  3. 11 12月, 2013 8 次提交
  4. 10 12月, 2013 24 次提交
  5. 09 12月, 2013 1 次提交